DFT
2006
IEEE
13 years 6 months ago
2006
IEEE
As the technology enters the nano dimension, the inherent unreliability of nanoelectronics is making fault-tolerant architectures increasingly necessary in building nano systems. ...
DFT
2006
IEEE
13 years 8 months ago
2006
IEEE
With the recent development of nanoscale materials and assembly techniques, it is envisioned to build high-density reconfigurable systems which have never been achieved by the pho...
DFT
2006
IEEE
13 years 8 months ago
2006
IEEE
The concept of clocking for QCA, referred to as the four-phase clocking, is widely used. However, inherited characteristics of QCA, such as the way to hold state, the way to synch...
DFT
2006
IEEE
13 years 10 months ago
2006
IEEE
This paper1 discusses a defect tolerant and energy economized computing array for the DSP plane of a 3-D Heterogeneous System on a Chip. We present the J-platform, which employs c...
DFT
2006
IEEE
13 years 10 months ago
2006
IEEE
Image processing systems are increasingly used in safetycritical applications, and their hardening against soft errors becomes an issue. We propose a methodology to identify soft ...
DFT
2006
IEEE
13 years 10 months ago
2006
IEEE
This paper describes a methodology of creating a built-in diagnostic system of a System on Chip and experimental results of the system application on the AT94K FPSLIC with cores d...
DFT
2006
IEEE
13 years 10 months ago
2006
IEEE
Abstract— This paper proposes the control of monomer concentration as a novel improvement of the kinetic Tile Assembly Model (kTAM) to reduce the error rate in DNA selfassembly. ...
DFT
2006
IEEE
13 years 10 months ago
2006
IEEE
Control flow checking (CFC) is a well known concurrent checking technique for ensuring that a program’s instruction execution sequence follows permissible paths. Almost all CFC...
DFT
2006
IEEE
13 years 10 months ago
2006
IEEE
A Fault Tolerant Active Pixel Sensor (FTAPS) has been designed and fabricated to correct for point defects that occur in CMOS image sensors both at manufacturing and over the life...
DFT
2006
IEEE
13 years 10 months ago
2006
IEEE
In this paper we will introduce a novel approach for the on-chip generation of a faulttolerant clock. We will motivate why it becomes more and more desirable to provide VLSI circu...