DFT
2007
IEEE
13 years 8 months ago
2007
IEEE
This paper presents the adoption of the Triple Modular Redundancy coupled with the Partial Dynamic Reconfiguration of Field Programmable Gate Arrays to mitigate the effects of Sof...
DFT
2007
IEEE
13 years 8 months ago
2007
IEEE
DFT
2007
IEEE
13 years 10 months ago
2007
IEEE
DFT
2007
IEEE
13 years 10 months ago
2007
IEEE
We address two problems in this work, namely, 1) the resilience challenge in the future chips made up of massively defective nanoelements and organized in replicative multicore ar...
DFT
2007
IEEE
13 years 10 months ago
2007
IEEE
Decreasing feature sizes have led to an increased vulnerability of random logic to soft errors. A particle strike may cause a glitch or single event transient (SET) at the output ...
DFT
2007
IEEE
13 years 10 months ago
2007
IEEE
Growth of pixel density and sensor array size increases the likelihood of developing in-field pixel defects. An ongoing study on defect development in imagers has now provided us ...
DFT
2007
IEEE
13 years 10 months ago
2007
IEEE
The network-on-chip (NoC) paradigm is seen as a way of facilitating the integration of a large number of computational and storage blocks on a chip to meet several performance and...
DFT
2007
IEEE
13 years 10 months ago
2007
IEEE
During semiconductor manufacturing, particles undesirably depose on the surface of the wafer causing “open” and “short” defects to interconnects. In this paper, a third ty...
DFT
2007
IEEE
13 years 10 months ago
2007
IEEE
The paper discusses a novel approach for reduction of fault detection latency in a selfchecking sequential circuit. The Authors propose decomposing the finite state machine (FSM) ...
DFT
2007
IEEE
13 years 10 months ago
2007
IEEE
Many side-channel attacks on implementations of cryptographic algorithms have been developed in recent years demonstrating the ease of extracting the secret key. In response, vari...