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kemalgulluProfessor, Assistant
University of Kocaeli
kemalgullu
ICCAD
2007
IEEE
151views Hardware» more  ICCAD 2007»
13 years 8 months ago
A design flow dedicated to multi-mode architectures for DSP applications
This paper addresses the design of multi-mode architectures for digital signal processing applications. We present a dedicated design flow and its associated high-level synthesis t...
Cyrille Chavet, Caaliph Andriamisaina, Philippe Co...
CDC
2009
IEEE
129views Control Systems» more  CDC 2009»
13 years 8 months ago
Improving the performance of active set based Model Predictive Controls by dataflow methods
Abstract-- Dataflow representations of Digital Signal Processing (DSP) software have been developing since the 1980's. They have proven to be useful in identifying bottlenecks...
Ruirui Gu, Shuvra S. Bhattacharyya, William S. Lev...
ISSS
1996
IEEE
143views Hardware» more  ISSS 1996»
13 years 8 months ago
DSP Processor/Compiler Co-Design: A Quantitative Approach
In the paper the problem of processor/compiler codesign for digital signal processing and embedded SYstems is discussed. The main principle we follow is the top-down approach char...
Vojin Zivojnovic, Stefan Pees, C. Schälger, M...
GLVLSI
2002
IEEE
109views VLSI» more  GLVLSI 2002»
13 years 9 months ago
Minimizing resources in a repeating schedule for a split-node data-flow graph
Many computation-intensive or recursive applications commonly found in digital signal processing and image processing applications can be represented by data-flow graphs (DFGs). ...
Timothy W. O'Neil, Edwin Hsing-Mean Sha
SAMOS
2004
Springer
13 years 9 months ago
MOUSE: A Shortcut from Matlab Source to SIMD DSP Assembly Code
Abstract. This article presents a novel design flow called MOUSE for the effective development of digital signal processing systems in terms of development time, performance and p...
Gordon Cichon, Gerhard Fettweis
LCTRTS
2005
Springer
13 years 9 months ago
Complementing software pipelining with software thread integration
Software pipelining is a critical optimization for producing efficient code for VLIW/EPIC and superscalar processors in highperformance embedded applications such as digital sign...
Won So, Alexander G. Dean
ISLPED
2005
ACM
109views Hardware» more  ISLPED 2005»
13 years 10 months ago
Power reduction by varying sampling rate
The rate at which a digital signal processing (DSP) system operates depends on the highest frequency component in the input signal. DSP applications must sample their inputs at a ...
William R. Dieter, Srabosti Datta, Wong Key Kai
VISUALIZATION
2005
IEEE
13 years 10 months ago
The Visible Radio: Process Visualization of a Software-Defined Radio
In this case study, a data-oriented approach is used to visualize a complex digital signal processing pipeline. The pipeline implements a Frequency Modulated (FM) Software-Defined...
Matthew Hall, Alex Betts, Donna Cox, David Pointer...
SCAM
2005
IEEE
13 years 10 months ago
Control Flow Graph Reconstruction for Assembly Language Programs with Delayed Instructions
Most software for embedded systems, including digital signal processing systems, is coded in assembly language. For both understanding the software and for reverse compiling it to...
Nerina Bermudo, Andreas Krall, R. Nigel Horspool