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    ASPDAC
    2008
    ACM
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    A multicycle communication architecture and synthesis flow for Global interconnect Resource Sharing
    13 years 6 months ago
    A multicycle communication architecture and synthesis flow for Global interconnect Resource Sharing
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    In deep submicron technology, wire delay is no longer negligible and is gradually dominating the system latency. Some state-of-the-art architectural synthesis flows adopt the distr...
    Wei-Sheng Huang, Yu-Ru Hong, Juinn-Dar Huang, Ya-S...
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