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    EURODAC
    1994
    IEEE
    127views VHDL» more  EURODAC 1994»
    Optimal equivalent circuits for interconnect delay calculations using moments
    13 years 8 months ago
    Optimal equivalent circuits for interconnect delay calculations using moments
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    In performance-driven interconnect design, delay estimators are used to determine both the topology and the layout of good routing trees. We address the class of moment-matching, ...
    Sudhakar Muddu, Andrew B. Kahng
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