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DSD
2010
IEEE
133views Hardware» more  DSD 2010»
8 years 11 months ago
Area and Speed Oriented Implementations of Asynchronous Logic Operating under Strong Constraints
Asynchronous circuit implementations operating under strong constraints (DIMS, Direct Logic, some of NCL gates, etc.) are attractive due to: 1) regularity; 2) combined implementati...
Igor Lemberski, Petr Fiser
DSD
2010
IEEE
137views Hardware» more  DSD 2010»
9 years 10 days ago
A C-to-RTL Flow as an Energy Efficient Alternative to Embedded Processors in Digital Systems
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
Sameer D. Sahasrabuddhe, Sreenivas Subramanian, Ku...
DSD
2010
IEEE
149views Hardware» more  DSD 2010»
9 years 10 days ago
Low Latency Recovery from Transient Faults for Pipelined Processor Architectures
Abstract--Recent technology trends have made radiationinduced soft errors a growing threat to the reliability of microprocessors, a problem previously only known to the aerospace i...
Marcus Jeitler, Jakob Lechner
DSD
2010
IEEE
221views Hardware» more  DSD 2010»
9 years 10 days ago
Modeling Reconfigurable Systems-on-Chips with UML MARTE Profile: An Exploratory Analysis
Reconfigurable FPGA based Systems-on-Chip (SoC) architectures are increasingly becoming the preferred solution for implementing modern embedded systems, due to their flexible natur...
Sana Cherif, Imran Rafiq Quadri, Samy Meftali, Jea...
DSD
2010
IEEE
131views Hardware» more  DSD 2010»
9 years 10 days ago
A Test Bench for Distortion-Energy Optimization of a DSP-Based H.264/SVC Decoder
This paper describes an OMAP-based real-time test bench to find the Pareto frontier of an H.264/SVC decoder within a distortion-energy optimization space. A metric to estimate vide...
F. Pescador, E. Juarez, D. Samper, C. Sanz, Micka&...
DSD
2010
IEEE
141views Hardware» more  DSD 2010»
9 years 10 days ago
Adaptive Beamforming Using the Reconfigurable MONTIUM TP
Until a decade ago, the concept of phased array beamforming was mainly implemented with mechanical or analog solutions. Today, digital hardware has become powerful enough to perfor...
Marcel D. van de Burgwal, Kenneth C. Rovers, Koen ...
DSD
2010
IEEE
121views Hardware» more  DSD 2010»
9 years 10 days ago
Physical Layer for Spectrum-Aware Reconfigurable OFDM on an FPGA
Orthogonal Frequency Division Multiplexing (OFDM) can provide a flexible usage of the spectrum by controlling individual subcarriers. Sets of subcarriers can be zero-modulated to a...
Adolfo Recio, Peter M. Athanas
DSD
2010
IEEE
112views Hardware» more  DSD 2010»
9 years 27 days ago
Re-NUCA: Boosting CMP Performance Through Block Replication
— Chip Multiprocessor (CMP) systems have become the reference architecture for designing micro-processors, thanks to the improvements in semiconductor nanotechnology that have co...
Pierfrancesco Foglia, Cosimo Antonio Prete, Marco ...
DSD
2010
IEEE
111views Hardware» more  DSD 2010»
9 years 27 days ago
Faults Coverage Improvement Based on Fault Simulation and Partial Duplication
— A method how to improve the coverage of single faults in combinational circuits is proposed. The method is based on Concurrent Error Detection, but uses a fault simulation to f...
Jaroslav Borecky, Martin Kohlik, Hana Kubatova, Pa...
DSD
2010
IEEE
171views Hardware» more  DSD 2010»
9 years 27 days ago
Test Patterns Compression Technique Based on a Dedicated SAT-Based ATPG
— In this paper we propose a new method of test patterns compression based on a design of a dedicated SAT-based ATPG (Automatic Test Pattern Generator). This compression method i...
Jiri Balcarek, Petr Fiser, Jan Schmidt
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