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FPL
2007
Springer
125views Hardware» more  FPL 2007»
11 years 11 months ago
Run-time Partial Reconfiguration for Removal, Placement and Routing on the Virtex-II-Pro
Reconfigurable computing entails the utilization of a generalpurpose processor augmented with a reconfigurable hardware structure (usually an FPGA). Normally, a complete recon...
Stefan Raaijmakers, Stephan Wong
DATE
2009
IEEE
93views Hardware» more  DATE 2009»
12 years 4 days ago
DPR in high energy physics
The Active Buffer project is part of the CBM (compressed baryonic matter) experiment and takes advantage of the DPR (dynamic partial reconfiguration) technology, in which a dynam...
Wenxue Gao, Andreas Kugel, Reinhard Männer, N...
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