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    DATE
    2009
    IEEE
    98views Hardware» more  DATE 2009»
    Test architecture design and optimization for three-dimensional SoCs
    13 years 11 months ago
    Test architecture design and optimization for three-dimensional SoCs
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    Core-based system-on-chips (SoCs) fabricated on threedimensional (3D) technology are emerging for better integration capabilities. Effective test architecture design and optimizat...
    Li Jiang, Lin Huang, Qiang Xu
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