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CODES
2006
IEEE
9 years 8 months ago
Architectural support for safe software execution on embedded processors
The lack of memory safety in many popular programming languages, including C and C++, has been a cause for great concern in the realm of software reliability, verification, and mo...
Divya Arora, Anand Raghunathan, Srivaths Ravi, Nir...
CAMP
2005
IEEE
9 years 8 months ago
16-bit Floating Point Instructions for Embedded Multimedia Applications
— We have simulated the implementation of 16-bit floating point instructions on a Pentium4 and PowerPC G4 and G5 to evaluate the performance impact of these instructions in embed...
Lionel Lacassagne, Daniel Etiemble, S. A. Ould Kab...
LCPC
2000
Springer
9 years 10 months ago
Improving Offset Assignment for Embedded Processors
Embedded systems consisting of the application program ROM, RAM, the embedded processor core, and any custom hardware on a single wafer are becoming increasingly common in applicat...
Sunil Atri, J. Ramanujam, Mahmut T. Kandemir
CODES
2001
IEEE
9 years 10 months ago
Towards effective embedded processors in codesigns: customizable partitioned caches
This paper explores an application-specific customization technique for the data cache, one of the foremost area/power consuming and performance determining microarchitectural fea...
Peter Petrov, Alex Orailoglu
FPL
2006
Springer
242views Hardware» more  FPL 2006»
9 years 10 months ago
TMD-MPI: An MPI Implementation for Multiple Processors Across Multiple FPGAs
With current FPGAs, designers can now instantiate several embedded processors, memory units, and a wide variety of IP blocks to build a single-chip, high-performance multiprocesso...
Manuel Saldaña, Paul Chow
CODES
2004
IEEE
9 years 10 months ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis
ASPDAC
1999
ACM
98views Hardware» more  ASPDAC 1999»
9 years 11 months ago
Generation of Interpretive and Compiled Instruction Set Simulators
Abstract Due to the large variety of di erent embedded processor types, retargetable software development tools, such as compilers and simulators, have received attention recently....
Rainer Leupers, Johann Elste, Birger Landwehr
PATMOS
2005
Springer
10 years 8 days ago
Area-Aware Pipeline Gating for Embedded Processors
Modern embedded processors use small and simple branch predictors to improve performance. Using complex and accurate branch predictors, while desirable, is not possible as such pre...
Babak Salamat, Amirali Baniasadi
CASES
2006
ACM
10 years 23 days ago
Scalable subgraph mapping for acyclic computation accelerators
Computer architects are constantly faced with the need to improve performance and increase the efficiency of computation in their designs. To this end, it is increasingly common ...
Nathan Clark, Amir Hormati, Scott A. Mahlke, Sami ...
VLSID
2008
IEEE
122views VLSI» more  VLSID 2008»
10 years 1 months ago
Implementing the Best Processor Cores
It is well-known that varying architectural, technological and implementation aspects of embedded microprocessors, such as ARM, can produce widely differing performance and power ...
Vamsi Boppana, Rahoul Varma, S. Balajee
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