Sciweavers

TCSV
2002
89views more  TCSV 2002»
13 years 4 months ago
Reducing energy dissipation of frame memory by adaptive bit-width compression
Abstract--In this paper, we propose a new architectural technique to reduce energy dissipation of frame memory through adaptive bitwith compression. Unlike related approaches, the ...
Vasily G. Moshnyaga
JSA
2008
94views more  JSA 2008»
13 years 4 months ago
Energy reduction through crosstalk avoidance coding in networks on chip
Commercial designs are currently integrating from 10 to 100 embedded processors in a single system on chip (SoC) and the number is likely to increase significantly in the near fut...
Partha Pratim Pande, Amlan Ganguly, Haibo Zhu, Cri...
DAGSTUHL
2007
13 years 5 months ago
Energy Scalability and the RESUME Scalable Video Codec
In the context of the RESUME-project a scalable wavelet-based video decoder was built to demonstrate the benefits of reconfigurable hardware for scalable applications. Scalable v...
Harald Devos, Hendrik Eeckhaut, Mark Christiaens, ...
GLOBECOM
2009
IEEE
13 years 8 months ago
Energy-Efficient Multi-Pipeline Architecture for Terabit Packet Classification
Energy efficiency has become a critical concern in designing high speed packet classification engines for next generation routers. Although TCAM-based solutions can provide high th...
Weirong Jiang, Viktor K. Prasanna
ISLPED
1997
ACM
130views Hardware» more  ISLPED 1997»
13 years 8 months ago
Analytical energy dissipation models for low-power caches
We present detailed analytical models for estimating the energy dissipation in conventional caches as well as low energy cache architectures. The analytical models use the run tim...
Milind B. Kamble, Kanad Ghose
ICCAD
1998
IEEE
64views Hardware» more  ICCAD 1998»
13 years 8 months ago
Energy-efficiency in presence of deep submicron noise
Presented in this paper are 1) information-theoretic lower bounds on energy consumption of noisy digital gates and 2) the concept of noise tolerance via coding for achieving energy...
Rajamohana Hegde, Naresh R. Shanbhag
VLSID
1999
IEEE
102views VLSI» more  VLSID 1999»
13 years 8 months ago
A Low-Power Wireless Camera System
This paper describes the system design of a lowpower wireless camera. A system level approach is used to reduce energy dissipation and maximize battery lifetime. System properties...
Anantha Chandrakasan, Abram P. Dancy, James Goodma...
ISCAS
1999
IEEE
94views Hardware» more  ISCAS 1999»
13 years 8 months ago
Lower bounds on energy dissipation and noise-tolerance for deep submicron VLSI
In this paper, we obtain the lower bounds on total energy dissipation of deep submicron (DSM) VLSI circuits via an informationtheoretic framework. This framework enables the deriv...
Rajamohana Hegde, Naresh R. Shanbhag
ARITH
1999
IEEE
13 years 8 months ago
Low-Power Division: Comparison among Implementations of Radix 4, 8 and 16
Although division is less frequent than addition and multiplication, because of its longer latency it dissipates a substantial part of the energy in floating-point units. In this ...
Alberto Nannarelli, Tomás Lang
VTS
2003
IEEE
115views Hardware» more  VTS 2003»
13 years 9 months ago
Fault Testing for Reversible Circuits
Irreversible computation necessarily results in energy dissipation due to information loss. While small in comparison to the power consumption of today’s VLSI circuits, if curre...
Ketan N. Patel, John P. Hayes, Igor L. Markov