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ASPDAC
2012
ACM
241views Hardware» more  ASPDAC 2012»
7 years 10 months ago
On error modeling of electrical bugs for post-silicon timing validation
—There is great demand for an accurate and scalable metric to evaluate the functional stimuli, testbench checkers, and DfD (Design-for-Debug) structures used in post-silicon timi...
Ming Gao, Peter Lisherness, Kwang-Ting Cheng, Jing...
CHI
2011
ACM
8 years 6 months ago
Modeling and predicting pointing errors in two dimensions
Recently, Wobbrock et al. (2008) derived a predictive model of pointing accuracy to complement Fitts’ law’s predictive model of pointing speed. However, their model was based ...
Jacob O. Wobbrock, Alex Jansen, Kristen Shinohara
IFIP
1999
Springer
9 years 6 months ago
Design Error Diagnosis in Digital Circuits without Error Model
We describe a new method for design error diagnosis in digital circuits, that doesn’t use any error model. A diagnostic specific pre-analysis of the circuit extracts a subcircui...
Raimund Ubar, Dominique Borrione
WONS
2005
IEEE
9 years 8 months ago
Building a Better Wireless Mousetrap: Need for More Realism in Simulations
Reliable network simulators are important tools for research and development in the field of wireless communication. Although the ns-2 simulator is quite popular for testing wire...
Matthias Wellens, Marina Petrova, Janne Riihij&aum...
DSN
2007
IEEE
9 years 9 months ago
On the Selection of Error Model(s) for OS Robustness Evaluation
The choice of error model used for robustness evaluation of Operating Systems (OSs) influences the evaluation run time, implementation complexity, as well as the evaluation preci...
Andréas Johansson, Neeraj Suri, Brendan Mur...
CHI
2008
ACM
10 years 3 months ago
An error model for pointing based on Fitts' law
For decades, Fitts' law (1954) has been used to model pointing time in user interfaces. As with any rapid motor act, faster pointing movements result in increased errors. But...
Jacob O. Wobbrock, Edward Cutrell, Susumu Harada, ...
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