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ASPDAC
2007
ACM
89views Hardware» more  ASPDAC 2007»
13 years 8 months ago
Trace Compaction using SAT-based Reachability Analysis
In today's designs, when functional verification fails, engineers perform debugging using the provided error traces. Reducing the length of error traces can help the debugging...
Sean Safarpour, Andreas G. Veneris, Hratch Mangass...
DATE
2009
IEEE
100views Hardware» more  DATE 2009»
13 years 11 months ago
Increasing the accuracy of SAT-based debugging
Equivalence checking and property checking are powerful techniques to detect error traces. Debugging these traces is a time consuming design task where automation provides help. I...
André Sülflow, Görschwin Fey, C&e...