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ETS
2006
IEEE
88views Hardware» more  ETS 2006»
9 years 11 months ago
Minimal March Tests for Dynamic Faults in Random Access Memories
Gurgen Harutunyan, Valery A. Vardanian, Yervant Zo...
ETS
2006
IEEE
122views Hardware» more  ETS 2006»
10 years 3 months ago
Fault Identification in Reconfigurable Carry Lookahead Adders Targeting Nanoelectronic Fabrics
Online repair through reconfiguration is a particularly advantageous approach in the nanoelectronic environment since reconfigurability is naturally supported by the devices. Howe...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
ETS
2006
IEEE
89views Hardware» more  ETS 2006»
10 years 3 months ago
On-Chip Time Measurement Architecture with Femtosecond Timing Resolution
This paper presents a new on-chip time measurement architecture which is based on the Timeto-Digital Conversion (TDC) method that is capable of achieving a timing resolution of te...
Matthew Collins, Bashir M. Al-Hashimi
ETS
2006
IEEE
69views Hardware» more  ETS 2006»
10 years 5 months ago
A Low Cost Alternative Method for Harmonics Estimation in a BIST Context
Spectral analysis represents a key component in signal processing. The on-chip implementation of classical spectral estimation techniques is generally not considered as a viable B...
Vincent Fresnaud, Lilian Bossuet, Dominique Dallet...
ETS
2006
IEEE
106views Hardware» more  ETS 2006»
10 years 5 months ago
"Analogue Network of Converters": A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC
In this paper, complex mixed signal circuits such as SiP or SOC including several ADCs and DACs are considered. A new DFT technique is proposed allowing the test of this complete ...
Vincent Kerzerho, Philippe Cauvet, Serge Bernard, ...
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