This paper addresses the problem of design rule correct routing, i.e. the avoidance of illegal wiring patterns during routing. These illegal wiring patterns are due to the set of ...
Ed P. Huijbregts, Jos T. J. van Eijndhoven, Jochen...
The paper presents a synthesis approach for pipelinelike controller structures. These structures allow to implement a built-in self-test in two sessions without any extra test reg...
This paper introduces a new Generalized Signal Transition Graph model for specifying complex mixed asynchronous/synchronouscircuits, as found in system-level interfaces. Our goal h...
Peter Vanbekbergen, Chantal Ykman-Couvreur, Bill L...
In order to master the growing complexity of analogue electronic systems, modelling and simulation of analogue hardware at various levels is absolutely necessary. This paper prese...
Vincent Moser, Pascal Nussbaum, Hans Peter Amann, ...
Undetectable shorts may decrease the long term reliability of a circuit, cause intermittent failures, add noise and delay, or increase test pattern generation costs. This paper de...