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FCCM
1997
IEEE
106views VLSI» more  FCCM 1997»
10 years 1 months ago
Fault simulation on reconfigurable hardware
In this paper we introduce a new approach to fault simulation, using reconfigurable hardware to implement a critical path tracing algorithm. Our performance estimate shows that ou...
Miron Abramovici, Premachandran R. Menon
FCCM
1997
IEEE
111views VLSI» more  FCCM 1997»
10 years 1 months ago
Real-time stereo vision on the PARTS reconfigurable computer
This paper describes a powerful, scalable, reconfigurable computer called the PARTS engine. The PARTS engine consists of 16 Xilinx 4025 FPGAs, and 16 one-megabyte SRAMs. The FPGAs...
John Woodfill, Brian Von Herzen
FCCM
1997
IEEE
114views VLSI» more  FCCM 1997»
10 years 1 months ago
A wireless LAN demodulator in a Pamette: design and experience
Tom McDermott, Philip J. Ryan, Mark Shand, David J...
FCCM
1997
IEEE
103views VLSI» more  FCCM 1997»
10 years 1 months ago
An FPGA architecture for DRAM-based systolic computations
We propose an FPGA chip architecture based on a conventional FPGA logic array core, in which I/O pins are clocked at a much higher rate than that of the logic array that they serv...
Norman Margolus
FCCM
1997
IEEE
107views VLSI» more  FCCM 1997»
10 years 1 months ago
Garp: a MIPS processor with a reconfigurable coprocessor
John R. Hauser, John Wawrzynek
FCCM
1997
IEEE
129views VLSI» more  FCCM 1997»
10 years 1 months ago
The Chimaera reconfigurable functional unit
By strictly separating reconfigurable logic from their host processor, current custom computing systems suffer from a significant communication bottleneck. In this paper we descri...
Scott Hauck, Thomas W. Fry, Matthew M. Hosler, Jef...
FCCM
1997
IEEE
118views VLSI» more  FCCM 1997»
10 years 1 months ago
Computing kernels implemented with a wormhole RTR CCM
The Wormhole Run-Time Reconfiguration (RTR) computing paradigm is a method for creating high performance computational pipelines. The scalability, distributed control and data pow...
Ray Bittner, Peter M. Athanas
FCCM
1997
IEEE
118views VLSI» more  FCCM 1997»
10 years 1 months ago
Implementation of single precision floating point square root on FPGAs
Square root operation is hard to implement on FPGAs because of the complexity of the algorithms. In this paper, we present a non-restoring square root algorithm and two very simpl...
Yamin Li, Wanming Chu
FCCM
1997
IEEE
199views VLSI» more  FCCM 1997»
10 years 1 months ago
The RAW benchmark suite: computation structures for general purpose computing
The RAW benchmark suite consists of twelve programs designed to facilitate comparing, validating, and improving reconīŦgurable computing systems. These benchmarks run the gamut o...
Jonathan Babb, Matthew Frank, Victor Lee, Elliot W...
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