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FCCM
2008
IEEE
176views VLSI» more  FCCM 2008»
9 years 9 months ago
The Effectiveness of Configuration Merging in Point-to-Point Networks for Module-based FPGA Reconfiguration
Communications infrastructure for modular reconfiguration of FPGAs needs to support the changing communications interfaces of a sequence of modules. In order to avoid the overhead...
Shannon Koh, Oliver Diessel
FCCM
2008
IEEE
133views VLSI» more  FCCM 2008»
9 years 11 months ago
Runtime Filesystem Support for Reconfigurable FPGA Hardware Processes in BORPH
This paper presents the design of BORPH's file system layer for FPGA-based reconfigurable computers. BORPH provides user FPGA designs that execute as hardware processes acces...
Hayden Kwok-Hay So, Robert W. Brodersen
FCCM
2008
IEEE
114views VLSI» more  FCCM 2008»
10 years 4 months ago
Scaling Soft Processor Systems
As FPGA-based systems including soft-processors become increasingly common we are motivated to better understand the best way to scale the performance of such systems. In this pap...
Martin Labrecque, Peter Yiannacouras, J. Gregory S...
FCCM
2008
IEEE
145views VLSI» more  FCCM 2008»
10 years 4 months ago
High-Speed Elliptic Curve Cryptography Accelerator for Koblitz Curves
Kimmo U. Järvinen, Jorma O. Skyttä
FCCM
2008
IEEE
212views VLSI» more  FCCM 2008»
10 years 4 months ago
Map-reduce as a Programming Model for Custom Computing Machines
The map-reduce model requires users to express their problem in terms of a map function that processes single records in a stream, and a reduce function that merges all mapped out...
Jackson H. C. Yeung, C. C. Tsang, Kuen Hung Tsoi, ...
FCCM
2008
IEEE
128views VLSI» more  FCCM 2008»
10 years 4 months ago
Investigation of Programming Models for Emerging FPGA-Based High Performance Computing Systems
This work proposes a set of requirements for programming emerging FPGA-based high performance computing systems, and uses them to evaluate a number of existing parallel programmin...
Andrew W. H. House, Paul Chow
FCCM
2008
IEEE
137views VLSI» more  FCCM 2008»
10 years 4 months ago
Matrix Computations on Heterogeneous Reconfigurable Systems
Ling Zhuo, Qingbo Wang, Viktor K. Prasanna
FCCM
2008
IEEE
99views VLSI» more  FCCM 2008»
10 years 4 months ago
DSPs, BRAMs and a Pinch of Logic: New Recipes for AES on FPGAs
We present an AES cipher implementation that is based on the BlockRAM and DSP units embedded within Xilinx’s Virtex-5 FPGAs. An iterative “basic” module outputs a 32 bit col...
Saar Drimer, Tim Güneysu, Christof Paar
FCCM
2008
IEEE
133views VLSI» more  FCCM 2008»
10 years 4 months ago
Autonomous System on a Chip Adaptation through Partial Runtime Reconfiguration
This paper presents a proto-type autonomous signal processing system on a chip. The system is architected such that high performance digital signal processing occurs in the FPGA...
Matthew French, Erik Anderson, Dong-In Kang
FCCM
2008
IEEE
160views VLSI» more  FCCM 2008»
10 years 4 months ago
Facilitating Processor-Based DPR Systems for non-DPR Experts
Currently, only Xilinx Field Programmable Gate Arrays (FPGAs) support Dynamic Partial Reconfiguration (DPR). While there is currently some Computer Aided Design (CAD) tool support...
Edward Chen, William A. Gruver, Dorian Sabaz, Lesl...
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