FCCM
2008
IEEE
13 years 4 months ago
2008
IEEE
Communications infrastructure for modular reconfiguration of FPGAs needs to support the changing communications interfaces of a sequence of modules. In order to avoid the overhead...
FCCM
2008
IEEE
13 years 6 months ago
2008
IEEE
This paper presents the design of BORPH's file system layer for FPGA-based reconfigurable computers. BORPH provides user FPGA designs that execute as hardware processes acces...
FCCM
2008
IEEE
13 years 10 months ago
2008
IEEE
As FPGA-based systems including soft-processors become increasingly common we are motivated to better understand the best way to scale the performance of such systems. In this pap...
FCCM
2008
IEEE
13 years 10 months ago
2008
IEEE
FCCM
2008
IEEE
13 years 10 months ago
2008
IEEE
The map-reduce model requires users to express their problem in terms of a map function that processes single records in a stream, and a reduce function that merges all mapped out...
FCCM
2008
IEEE
13 years 10 months ago
2008
IEEE
This work proposes a set of requirements for programming emerging FPGA-based high performance computing systems, and uses them to evaluate a number of existing parallel programmin...
FCCM
2008
IEEE
13 years 10 months ago
2008
IEEE
FCCM
2008
IEEE
13 years 10 months ago
2008
IEEE
We present an AES cipher implementation that is based on the BlockRAM and DSP units embedded within Xilinx’s Virtex-5 FPGAs. An iterative “basic” module outputs a 32 bit col...
FCCM
2008
IEEE
13 years 10 months ago
2008
IEEE
This paper presents a proto-type autonomous signal processing system on a chip. The system is architected such that high performance digital signal processing occurs in the FPGA...
FCCM
2008
IEEE
13 years 10 months ago
2008
IEEE
Currently, only Xilinx Field Programmable Gate Arrays (FPGAs) support Dynamic Partial Reconfiguration (DPR). While there is currently some Computer Aided Design (CAD) tool support...