ISCAPDCS
2001
13 years 5 months ago
2001
The implementation of modern high performance computer is increasingly directed toward parallelism in the hardware. However, most of the current fetch units are limited to one bra...
MICRO
1995
IEEE
13 years 8 months ago
1995
IEEE
Accurate instruction fetch and branch prediction is increasingly important on today’s wide-issue architectures. Fetch prediction is the process of determining the next instructi...
ASSETS
2006
ACM
13 years 8 months ago
2006
ACM
Finding lost items is a common problem for the visually impaired and is something that computing technology can help alleviate. In this paper, we present the design and evaluation...
DATE
2004
IEEE
13 years 8 months ago
2004
IEEE
This paper proposes a low-energy solution for CAMbased highly associative I-caches using a segmented wordline and a predictor-based instruction fetch mechanism. Not all instructio...
ASPDAC
2004
ACM
13 years 8 months ago
2004
ACM
Abstract-- The power consumption of microprocessors has been increasing in step with the complexity of each progressive generation. In general purpose processors, this is primarily...
ICS
1999
Tsinghua U.
13 years 8 months ago
1999
Tsinghua U.
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
ICPP
2002
IEEE
13 years 9 months ago
2002
IEEE
Conventional instruction fetch mechanisms fetch contiguous blocks of instructions in each cycle. They are difficult to scale since taken branches make it hard to increase the siz...
ISLPED
2005
ACM
13 years 10 months ago
2005
ACM
1 A highly-efficient fetch unit is essential not only to obtain good performance but also to achieve energy efficiency. However, existing designs are inflexible and depending on pr...
APCSAC
2005
IEEE
13 years 10 months ago
2005
IEEE
Continuing advances in semiconductor technology and demand for higher performance will lead to more powerful, superpipelined and wider issue processors. Instruction caches in such ...
ISCA
2008
IEEE
13 years 11 months ago
2008
IEEE
Architectures that exploit control independence (CI) promise to remove in-order fetch bottlenecks, like branch mispredicts, instruction-cache misses and fetch unit stalls, from th...