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DSD
2005
IEEE
123views Hardware» more  DSD 2005»
13 years 10 months ago
Hardware-Based Implementation of the Common Approximate Substring Algorithm
An implementation of an algorithm for string matching, commonly used in DNA string analysis, using configurable technology is proposed. The design of the circuit allows for pipeli...
Kenneth B. Kent, Sharon Van Schaick, Jacqueline E....
AUIC
2005
IEEE
13 years 10 months ago
Hand Tracking For Low Powered Mobile AR User Interfaces
Mobile augmented reality systems use general purpose computing hardware to perform tasks such as rendering computer graphics, providing video overlay, and performing vision tracki...
Ross Smith, Wayne Piekarski, Grant B. Wigley
IPPS
2006
IEEE
13 years 10 months ago
Securing embedded programmable gate arrays in secure circuits
The purpose of this article is to propose a survey of possible approaches for implementing embedded reconfigurable gate arrays into secure circuits. A standard secure interfacing ...
Nicolas Valette, Lionel Torres, Gilles Sassatelli,...
IPPS
2006
IEEE
13 years 10 months ago
ReConfigME: a detailed implementation of an operating system for reconfigurable computing
Reconfigurable computing applications have traditionally had the exclusive use of the field programmable gate array, primarily because the logic densities of the available devices...
Grant B. Wigley, David A. Kearney, Mark Jasiunas
AHS
2006
IEEE
130views Hardware» more  AHS 2006»
13 years 10 months ago
Self-Adaptive System Based on Field Programmable Gate Array for Extreme Temperature Electronics
Space missions often require radiation and extreme-temperature hardened electronics to survive the harsh environments beyond earth’s atmosphere. Traditional approaches to preser...
Didier Keymeulen, Ricardo Salem Zebulum, Rajeshuni...
FPGA
2007
ACM
106views FPGA» more  FPGA 2007»
13 years 10 months ago
A synthesizable datapath-oriented embedded FPGA fabric
We present an architecture for a synthesizable datapathoriented Field Programmable Gate Array (FPGA) core which can be used to provide post-fabrication flexibility to a Systemon-...
Steven J. E. Wilton, Chun Hok Ho, Philip Heng Wai ...
ICRA
2007
IEEE
160views Robotics» more  ICRA 2007»
13 years 10 months ago
Morphing Bus: A rapid deployment computing architecture for high performance, resource-constrained robots
— For certain applications, field robotic systems require small size for cost, weight, access, stealth or other reasons. Small size results in constraints on critical resources s...
Colin D'Souza, Byung Hwa Kim, Richard M. Voyles
DELTA
2008
IEEE
13 years 11 months ago
A Visual Notation for Processor and Resource Scheduling
Scheduling of concurrent processors in a real-time image processing system on FPGA (Field programmable gate array) hardware is a not a trivial task. We propose a number of graphic...
Christopher T. Johnston, Paul J. Lyons, Donald G. ...
CF
2009
ACM
13 years 11 months ago
Wave field synthesis for 3D audio: architectural prospectives
In this paper, we compare the architectural perspectives of the Wave Field Synthesis (WFS) 3D-audio algorithm mapped on three different platforms: a General Purpose Processor (GP...
Dimitris Theodoropoulos, Catalin Bogdan Ciobanu, G...
ARC
2009
Springer
140views Hardware» more  ARC 2009»
13 years 11 months ago
FPGA-Based Anomalous Trajectory Detection Using SOFM
A system for automatically classifying the trajectory of a moving object in a scene as usual or suspicious is presented. The system uses an unsupervised neural network (Self Organi...
Kofi Appiah, Andrew Hunter, Tino Kluge, Philip Aik...