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    FPGA
    2003
    ACM
    82views FPGA» more  FPGA 2003»
    Post-placement C-slow retiming for the xilinx virtex FPGA
    13 years 9 months ago
    Post-placement C-slow retiming for the xilinx virtex FPGA
    Download  www.eecs.berkeley.edu
    Nicholas Weaver, Yury Markovsky, Yatish Patel, Joh...
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    FPGA
    2003
    ACM
    116views FPGA» more  FPGA 2003»
    Hardware-assisted simulated annealing with application for fast FPGA placement
    13 years 9 months ago
    Hardware-assisted simulated annealing with application for fast FPGA placement
    Download  ic.ese.upenn.edu
    To truly exploit FPGAs for rapid turn-around development and prototyping, placement times must be reduced to seconds; latebound, reconfigurable computing applications may demand p...
    Michael G. Wrighton, André DeHon
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    FPGA
    2003
    ACM
    138views FPGA» more  FPGA 2003»
    Automatic transistor and physical design of FPGA tiles from an architectural specification
    13 years 9 months ago
    Automatic transistor and physical design of FPGA tiles from an architectural specification
    Download  www.eecg.toronto.edu
    One of the most difficult and time-consuming steps in the creation of an FPGA is its transistor-level design and physical layout. Modern commercial FPGAs typically consume anywher...
    Ketan Padalia, Ryan Fung, Mark Bourgeault, Aaron E...
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    FPGA
    2003
    ACM
    117views FPGA» more  FPGA 2003»
    PipeRoute: a pipelining-aware router for FPGAs
    13 years 9 months ago
    PipeRoute: a pipelining-aware router for FPGAs
    Download  www.ee.washington.edu
    We present a pipelining-aware router for FPGAs. The problem of routing pipelined signals is different from the conventional FPGA routing problem. For example, the two terminal N-D...
    Akshay Sharma, Carl Ebeling, Scott Hauck
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    FPGA
    2003
    ACM
    137views FPGA» more  FPGA 2003»
    Design of FPGA interconnect for multilevel metalization
    13 years 9 months ago
    Design of FPGA interconnect for multilevel metalization
    Download  ic.ese.upenn.edu
    How does multilevel metalization impact the design of FPGA interconnect? The availability of a growing number of metal layers presents the opportunity to use wiring in the thirddi...
    Raphael Rubin, André DeHon
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    FPGA
    2003
    ACM
    88views FPGA» more  FPGA 2003»
    High-level modeling and FPGA prototyping of microprocessors
    13 years 9 months ago
    High-level modeling and FPGA prototyping of microprocessors
    Download  www.ece.cmu.edu
    Joydeep Ray, James C. Hoe
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    FPGA
    2003
    ACM
    117views FPGA» more  FPGA 2003»
    Reducing pin and area overhead in fault-tolerant FPGA-based designs
    13 years 9 months ago
    Reducing pin and area overhead in fault-tolerant FPGA-based designs
    Download  www.cecs.uci.edu
    This paper proposes a new high-level technique for designing fault tolerant systems in SRAM-based FPGAs, without modifications in the FPGA architecture. Traditionally, TMR has bee...
    Fernanda Lima, Luigi Carro, Ricardo Augusto da Luz...
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    FPGA
    2003
    ACM
    120views FPGA» more  FPGA 2003»
    Architecture evaluation for power-efficient FPGAs
    13 years 9 months ago
    Architecture evaluation for power-efficient FPGAs
    Download  www.icims.csl.uiuc.edu
    This paper presents a flexible FPGA architecture evaluation framework, named fpgaEVA-LP, for power efficiency analysis of LUT-based FPGA architectures. Our work has several contri...
    Fei Li, Deming Chen, Lei He, Jason Cong
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    FPGA
    2003
    ACM
    77views FPGA» more  FPGA 2003»
    Stochastic, spatial routing for hypergraphs, trees, and meshes
    13 years 9 months ago
    Stochastic, spatial routing for hypergraphs, trees, and meshes
    Download  ic.ese.upenn.edu
    Randy Huang, John Wawrzynek, André DeHon
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    FPGA
    2003
    ACM
    123views FPGA» more  FPGA 2003»
    Wire type assignment for FPGA routing
    13 years 9 months ago
    Wire type assignment for FPGA routing
    Download  domino.research.ibm.com
    The routing channels of an FPGA consist of wire segments of various types providing the tradeoff between performance and routability. In the routing architectures of recently dev...
    Seokjin Lee, Hua Xiang, D. F. Wong, Richard Y. Sun
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