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FPGA
2010
ACM
182views FPGA» more  FPGA 2010»
13 years 2 months ago
A comprehensive approach to modeling, characterizing and optimizing for metastability in FPGAs
Metastability is a phenomenon that can cause system failures in digital circuits. It may occur whenever signals are being transmitted across asynchronous or unrelated clock domain...
Doris Chen, Deshanand Singh, Jeffrey Chromczak, Da...
FPGA
2010
ACM
232views FPGA» more  FPGA 2010»
13 years 4 months ago
High-throughput bayesian computing machine with reconfigurable hardware
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
Mingjie Lin, Ilia Lebedev, John Wawrzynek
FPGA
2010
ACM
197views FPGA» more  FPGA 2010»
13 years 7 months ago
A 3d-audio reconfigurable processor
Various multimedia communication systems based on 3DAudio algorithms have been proposed by researchers from the acoustic data processing domain. However, all systems reported in t...
Dimitris Theodoropoulos, Georgi Kuzmanov, Georgi G...
FPGA
2010
ACM
181views FPGA» more  FPGA 2010»
13 years 7 months ago
Efficient multi-ported memories for FPGAs
Multi-ported memories are challenging to implement with FPGAs since the provided block RAMs typically have only two ports. We present a thorough exploration of the design space of...
Charles Eric LaForest, J. Gregory Steffan
FPGA
2010
ACM
151views FPGA» more  FPGA 2010»
13 years 9 months ago
Energy efficient sensor node implementations
Jan R. Frigo, Eric Y. Raby, Sean M. Brennan, Chris...
FPGA
2010
ACM
294views FPGA» more  FPGA 2010»
13 years 9 months ago
Axel: a heterogeneous cluster with FPGAs and GPUs
This paper describes a heterogeneous computer cluster called Axel. Axel contains a collection of nodes; each node can include multiple types of accelerators such as FPGAs (Field P...
Kuen Hung Tsoi, Wayne Luk
FPGA
2010
ACM
191views FPGA» more  FPGA 2010»
13 years 10 months ago
Voter insertion algorithms for FPGA designs using triple modular redundancy
Triple Modular Redundancy (TMR) is a common reliability technique for mitigating single event upsets (SEUs) in FPGA designs operating in radiation environments. For FPGA systems t...
Jonathan M. Johnson, Michael J. Wirthlin
FPGA
2010
ACM
178views FPGA» more  FPGA 2010»
13 years 11 months ago
Designing hardware with dynamic memory abstraction
Jirí Simsa, Satnam Singh
FPGA
2010
ACM
201views FPGA» more  FPGA 2010»
13 years 11 months ago
Scalable network virtualization using FPGAs
Deepak Unnikrishnan, Ramakrishna Vadlamani, Yong L...
FPGA
2010
ACM
227views FPGA» more  FPGA 2010»
14 years 1 months ago
On-line sensing for healthier FPGA systems
Electronic systems increasingly suffer from component variation, thermal hotspots, uneven wearout, and other subtle physical phenomena. Systems based on FPGAs have unique opportun...
Kenneth M. Zick, John P. Hayes