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FPL
1997
Springer
242views Hardware» more  FPL 1997»
12 years 1 months ago
Technology mapping by binate covering
Technology mapping can be viewed as the optimization problem of finding a minimum cost cover of the given Boolean network by choosing from given library of logic cells. The core of...
Michal Servít, Kang Yi
FPL
1997
Springer
130views Hardware» more  FPL 1997»
12 years 1 months ago
Riley-2: A flexible platform for codesign and dynamic reconfigurable computing research
: The paper first proposes requirements for an ideal platform for codesign research. A new board developed at Imperial College, the Riley-2, is shown to meet these requirements. It...
Patrick I. Mackinlay, Peter Y. K. Cheung, Wayne Lu...
FPL
1997
Springer
68views Hardware» more  FPL 1997»
12 years 1 months ago
Pipeline morphing and virtual pipelines
Abstract. Pipeline morphing is a simple but e ective technique for recon guring pipelined FPGA designs at run time. By overlapping computation and recon guration, the latency assoc...
Wayne Luk, Nabeel Shirazi, Shaori Guo, Peter Y. K....
FPL
1997
Springer
123views Hardware» more  FPL 1997»
12 years 1 months ago
P4: A platform for FPGA implementation of protocol boosters
Protocol Boosters are functional elements, inserted anddeleted fromnetwork protocol stacks on an as-neededbasis. The Protocol Booster design methodology attempts to improve end-to-...
Ilija Hadzic, Jonathan M. Smith
FPL
1997
Springer
78views Hardware» more  FPL 1997»
12 years 1 months ago
Run-time compaction of FPGA designs
Controllers for dynamically recon gurable FPGAs that are capable of supporting multiple independent tasks simultaneously need to be able to place designs at run{time when the seque...
Oliver Diessel, Hossam A. ElGindy
FPL
1997
Springer
75views Hardware» more  FPL 1997»
12 years 1 months ago
Thermal monitoring on FPGAs using ring-oscillators
In this paper, a temperature-to-frequency transducer suitable for thermal monitoring on FPGAs is presented. The dependence between delay and temperature is used to produce a freque...
Eduardo I. Boemo, Sergio López-Buedo
FPL
1997
Springer
125views Hardware» more  FPL 1997»
12 years 1 months ago
VPR: A new packing, placement and routing tool for FPGA research
We describe the capabilities of and algorithms used in a new FPGA CAD tool, Versatile Place and Route (VPR). In terms of minimizing routing area, VPR outperforms all published FPG...
Vaughn Betz, Jonathan Rose
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