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FPL
2004
Springer
95views Hardware» more  FPL 2004»
13 years 9 months ago
Increasing Pipelined IP Core Utilization in Process Networks Using Exploration
At Leiden Embedded Research Center, we are building a tool chain called Compaan/Laura that allows us to do fast mapping of applications written in Matlab onto reconfigurable platf...
Claudiu Zissulescu, Bart Kienhuis, Ed F. Depretter...
FPL
2004
Springer
93views Hardware» more  FPL 2004»
13 years 9 months ago
The Impact of Pipelining on Energy per Operation in Field-Programmable Gate Arrays
This paper investigates experimentally the quantitative impact of pipelining on energy per operation for two representative FPGA devices: a 0.13µm CMOS high density/high speed FPG...
Steven J. E. Wilton, Su-Shin Ang, Wayne Luk
FPL
2004
Springer
113views Hardware» more  FPL 2004»
13 years 9 months ago
An Evolvable Hardware Tutorial
Abstract. Evolvable Hardware (EHW) is a scheme - inspired by natural evolution, for automatic design of hardware systems. By exploring a large design search space, EHW may find so...
Jim Torresen
FPL
2004
Springer
128views Hardware» more  FPL 2004»
13 years 9 months ago
Design and Implementation of a CFAR Processor for Target Detection
Real-time performance of adaptive digital signal processing algorithms is required in many applications but it often means a high computational load for many conventional processor...
Cesar Torres-Huitzil, René Cumplido-Parra, ...
FPL
2004
Springer
80views Hardware» more  FPL 2004»
13 years 9 months ago
Secure Logic Synthesis
This paper describes the synthesis of dynamic differential logic to increase the resistance of FPGAs against Differential Power Analysis. Compared with an existing technique, it sa...
Kris Tiri, Ingrid Verbauwhede
FPL
2004
Springer
95views Hardware» more  FPL 2004»
13 years 9 months ago
Solving SAT with a Context-Switching Virtual Clause Pipeline and an FPGA Embedded Processor
Abstract. This paper proposes an architecture that combines a contextswitching virtual configware/software SAT solver with an embedded processor to promote a tighter coupling betwe...
C. J. Tavares, C. Bungardean, G. M. Matos, Jos&eac...
FPL
2004
Springer
81views Hardware» more  FPL 2004»
13 years 9 months ago
Power Analysis Attacks Against FPGA Implementations of the DES
François-Xavier Standaert, Siddika Berna &O...
FPL
2004
Springer
74views Hardware» more  FPL 2004»
13 years 9 months ago
Hardware/Software Implementation of FPGA-Targeted Matrix-Oriented SAT Solvers
The paper describes two methods for the design of matrix-oriented SAT solvers based on data compression. The first one provides matrix compression in a host computer and decompress...
Valery Sklyarov, Iouliia Skliarova, Bruno Figueire...
FPL
2004
Springer
99views Hardware» more  FPL 2004»
13 years 9 months ago
A Novel FPGA Configuration Bitstream Generation Algorithm and Tool Development
A novel configuration bitstream generation tool for a custom FPGA platform is presented. It can support a variety of devices of similar architecture. The tool exhibits technology i...
K. Siozios, George Koutroumpezis, Konstantinos Tat...