Sciweavers

Share
warning: Creating default object from empty value in /var/www/modules/taxonomy/taxonomy.module on line 1416.
FPL
2006
Springer
135views Hardware» more  FPL 2006»
12 years 1 months ago
FPGA Design Considerations in the Implementation of a Fixed-Throughput Sphere Decoder for MIMO Systems
A field-programmable gate array (FPGA) implementation of a new detection algorithm for uncoded multiple inputmultiple output (MIMO) systems based on the complex version of the sph...
Luis G. Barbero, John S. Thompson
FPL
2006
Springer
103views Hardware» more  FPL 2006»
12 years 1 months ago
An Efficient Fault Tolerance Scheme for Preventing Single Event Disruptions in Reconfigurable Architectures
Reconfigurable architectures are becoming increasingly popular with space related design engineers as they are inherently flexible to meet multiple requirements and offer signific...
Sajid Baloch, Tughrul Arslan, Adrian Stoica
FPL
2006
Springer
120views Hardware» more  FPL 2006»
12 years 1 months ago
Regular Expression Software Deceleration for Intrusion Detection Systems
The use of reconfigurable hardware for network security applications has recently made great strides as FPGA devices have provided larger and faster resources. Regular expressions...
Zachary K. Baker, Viktor K. Prasanna, Hong-Jip Jun...
FPL
2006
Springer
223views Hardware» more  FPL 2006»
12 years 1 months ago
From Equation to VHDL: Using Rewriting Logic for Automated Function Generation
This paper presents a novel tool flow combining rewriting logic with hardware synthesis. It enables the automated generation of synthesizable VHDL code from mathematical equations...
Carlos Morra, M. Sackmann, Sunil Shukla, Jürg...
FPL
2006
Springer
132views Hardware» more  FPL 2006»
12 years 1 months ago
Adaptive FPGAs: High-Level Architecture and a Synthesis Method
This paper presents preliminary work exploring adaptive field programmable gate arrays (AFPGAs). An AFPGA is adaptative in the sense that the functionality of subcircuits placed o...
Valavan Manohararajah, Stephen Dean Brown, Zvonko ...
FPL
2006
Springer
111views Hardware» more  FPL 2006»
12 years 1 months ago
A-B Nodes Classification for Power Estimation
In this paper, an optimization for the classical statistical power estimation method is proposed. This technique is applied to the individual nodes. The optimization is based on t...
Elias Todorovich, Eduardo I. Boemo
FPL
2006
Springer
158views Hardware» more  FPL 2006»
12 years 1 months ago
Placing Functionality in Fault-Tolerant Hardware/Software Reconfigurable Networks
A novel framework shows the potential of FPGA-based systems for increasing fault-tolerance and flexibility by placing functionality onto free hardware (HW) or software (SW) resour...
Thilo Streichert
FPL
2006
Springer
91views Hardware» more  FPL 2006»
12 years 1 months ago
Reconfigurable Systems Enabled by a Network-on-Chip
A modern SoC design comprises dozens of dedicated IP cores for specialized tasks and processors for generalpurpose tasks. Flexibility is the key feature of processors, since it is...
Leandro Möller, Ismael Grehs, Ney Calazans, F...
FPL
2006
Springer
118views Hardware» more  FPL 2006»
12 years 1 months ago
Activity Estimation for Field-Programmable Gate Arrays
This paper examines various activity estimation techniques in order to determine which are most appropriate for use in the context of field-programmable gate arrays (FPGAs). Speci...
Julien Lamoureux, Steven J. E. Wilton
FPL
2006
Springer
147views Hardware» more  FPL 2006»
12 years 1 months ago
Non-Uniform Random Number Generation Through Piecewise Linear Approximations
This paper presents a hardware architecture for non-uniform random number generation, which allows the generator's distribution to be modified at run-time without reconfigura...
David B. Thomas, Wayne Luk
books