Sciweavers

ISMVL
2007
IEEE
92views Hardware» more  ISMVL 2007»
13 years 11 months ago
Experimental Studies on SAT-Based ATPG for Gate Delay Faults
The clock rate of modern chips is still increasing and at the same time the gate size decreases. As a result, already slight variations during the production process may cause a f...
Stephan Eggersglüß, Daniel Tille, G&oum...