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ICCAD
1994
IEEE

131views Hardware» more ICCAD 1994»

Edge-map: optimal performance driven technology mapping for iterative LUT based FPGA designs

13 years 8 months ago

We consider the problem of performance driven lookup-table (LUT) based technology mapping for FPGAs using a general delay model. In the general delay model, each interconnection e...

Hannah Honghua Yang, D. F. Wong

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