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GLVLSI
1999
IEEE
105views VLSI» more  GLVLSI 1999»
10 years 4 days ago
An Integrated Approach for Synthesizing LUT Networks
This paper presents a method for synthesizing lookup table (LUT) networks. The strategy employed by our method is very different from the strategies of previous methods; many deco...
Shigeru Yamashita, Hiroshi Sawada, Akira Nagoya
GLVLSI
1999
IEEE
81views VLSI» more  GLVLSI 1999»
10 years 4 days ago
Parallel Saturating Fractional Arithmetic Units
This paper describes the designs of a saturating adder, multiplier, single MAC unit, and dual MAC unit with one cycle latencies. The dual MAC unit can perform two saturating MAC o...
Navindra Yadav, Michael J. Schulte, John Glossner
GLVLSI
1999
IEEE
85views VLSI» more  GLVLSI 1999»
10 years 4 days ago
Reducing BDD Size by Exploiting Structural Connectivity
Ronnie L. Wright, Michael A. Shanblatt
GLVLSI
1999
IEEE
152views VLSI» more  GLVLSI 1999»
10 years 4 days ago
A Low Power Charge-Recycling CMOS Clock Buffer
Xiaohui Wang, Wolfgang Porod
GLVLSI
1999
IEEE
70views VLSI» more  GLVLSI 1999»
10 years 4 days ago
Current Sensor on the Base of Permanent Pre-chargeable Amplifier
Victor Varshavsky, Masayuki Tsukisaka
GLVLSI
1999
IEEE
95views VLSI» more  GLVLSI 1999»
10 years 4 days ago
Numerical Tools for Fracture of MEMS Devices
N. Tayebi, A. K. Tayebi, Y. Belkacemi
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