GLVLSI
2002
IEEE
13 years 9 months ago
2002
IEEE
We present a novel test scheduling algorithm for embedded corebased SoC’s. Given a system integrated with a set of cores and a set of test resources, we select a test for each c...
GLVLSI
2002
IEEE
13 years 9 months ago
2002
IEEE
GLVLSI
2002
IEEE
13 years 9 months ago
2002
IEEE
Spectral techniques have found many applications in computeraided design, including synthesis, verification, and testing. Decision diagram representations permit spectral coeffici...
GLVLSI
2002
IEEE
13 years 9 months ago
2002
IEEE
The paper presents a satisfiability-based method for solving the board-level multiterminal net routing problem in Clos-Folded FPGA based logic emulation systems. The approach tran...
GLVLSI
2002
IEEE
13 years 9 months ago
2002
IEEE
A compact delay model for series connected MOSFETs has been derived. This model enables accurate prediction of worst-case delay of different logic families such as dynamic logic. ...
GLVLSI
2002
IEEE
13 years 9 months ago
2002
IEEE
GLVLSI
2002
IEEE
13 years 9 months ago
2002
IEEE
GLVLSI
2002
IEEE
13 years 9 months ago
2002
IEEE
Many computation-intensive or recursive applications commonly found in digital signal processing and image processing applications can be represented by data-flow graphs (DFGs). ...
GLVLSI
2002
IEEE
13 years 9 months ago
2002
IEEE
This paper describes a new design for a hardware accelerator to support grid-based Maze Routing. Based on the direct mapped approach of Breuer and Shamsa [3], this work refines th...
GLVLSI
2002
IEEE
13 years 9 months ago
2002
IEEE
