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GLVLSI
2006
IEEE
105views VLSI» more  GLVLSI 2006»
9 years 6 months ago
A practical approach for monitoring analog circuits
Formal methods have been advocated for the verification of digital design where correctness is proved mathematically. In contrast to digital designs, the verification of analog ...
Mohamed H. Zaki, Sofiène Tahar, Guy Bois
GLVLSI
2006
IEEE
155views VLSI» more  GLVLSI 2006»
9 years 6 months ago
Dynamic voltage scaling for multitasking real-time systems with uncertain execution time
Dynamic voltage scaling (DVS) for real-time systems has been extensively studied to save energy. Previous studies consider the probabilistic distributions of tasks’ execution ti...
Changjiu Xian, Yung-Hsiang Lu
GLVLSI
2006
IEEE
119views VLSI» more  GLVLSI 2006»
9 years 6 months ago
PWAM signalling scheme for high speed serial link transceiver design
This paper presents a new signaling scheme called PWAM (pulse width and amplitude modulation) to obtain the optimum combination of bandwidth and performance of the serial link tra...
Rui Tang, Yong-Bin Kim
GLVLSI
2006
IEEE
98views VLSI» more  GLVLSI 2006»
9 years 6 months ago
Rapid intermodulation distortion estimation in fully balanced weakly nonlinear Gm-C filters using state-space modeling
State-space modeling of fully differential Gm-C filters with weak nonlinearities is used to develop a fast algorithm for intermodulation distortion estimation. It results in sim...
Paul Sotiriadis, Abdullah Celik, Zhaonian Zhang
GLVLSI
2006
IEEE
120views VLSI» more  GLVLSI 2006»
9 years 6 months ago
Sensitivity evaluation of global resonant H-tree clock distribution networks
A sensitivity analysis of resonant H-tree clock distribution networks is presented in this paper for a TSMC 0.18 μm CMOS technology. The analysis focuses on the effect of the dri...
Jonathan Rosenfeld, Eby G. Friedman
GLVLSI
2006
IEEE
133views VLSI» more  GLVLSI 2006»
9 years 6 months ago
Design approaches for hybrid CMOS/molecular memory based on experimental device data
Garrett S. Rose, Adam C. Cabe, Nadine Gergel-Hacke...
GLVLSI
2006
IEEE
101views VLSI» more  GLVLSI 2006»
9 years 6 months ago
Measurement and characterization of pattern dependent process variations of interconnect resistance, capacitance and inductance
Process variations have become a serious concern for nanometer technologies. The interconnect and device variations include interand intra-die variations of geometries, as well as...
Xiaoning Qi, Alex Gyure, Yansheng Luo, Sam C. Lo, ...
GLVLSI
2006
IEEE
142views VLSI» more  GLVLSI 2006»
9 years 6 months ago
Dynamic instruction schedulers in a 3-dimensional integration technology
We present the design of high-performance and energy-efficient dynamic instruction schedulers in a 3-Dimensional integration technology. Based on a previous observation that the c...
Kiran Puttaswamy, Gabriel H. Loh
GLVLSI
2006
IEEE
119views VLSI» more  GLVLSI 2006»
9 years 6 months ago
Thermal analysis of a 3D die-stacked high-performance microprocessor
3-dimensional integrated circuit (3D IC) technology places circuit blocks in the vertical dimension in addition to the conventional horizontal plane. Compared to conventional plan...
Kiran Puttaswamy, Gabriel H. Loh
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