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GLVLSI
2010
IEEE
141views VLSI» more  GLVLSI 2010»
9 years 7 days ago
Energy-efficient redundant execution for chip multiprocessors
Relentless CMOS scaling coupled with lower design tolerances is making ICs increasingly susceptible to wear-out related permanent faults and transient faults, necessitating on-chi...
Pramod Subramanyan, Virendra Singh, Kewal K. Saluj...
GLVLSI
2010
IEEE
168views VLSI» more  GLVLSI 2010»
9 years 8 days ago
A revisit to voltage partitioning problem
We revisit voltage partitioning problem when the mapped voltages of functional units are predetermined. If energy consumption is estimated by formulation E = CV 2 , a published wo...
Tao Lin, Sheqin Dong, Bei Yu, Song Chen, Satoshi G...
GLVLSI
2010
IEEE
296views VLSI» more  GLVLSI 2010»
9 years 8 days ago
AOP-based high-level power estimation in SystemC
The paper presents a novel high-level power modeling and estimation framework. The approach is based on a synergic integration of aspect-oriented programming(AOP) and SystemC. Mac...
Feng Liu, QingPing Tan, Xiaoyu Song, Naeem Abbasi
GLVLSI
2010
IEEE
149views VLSI» more  GLVLSI 2010»
9 years 2 months ago
Lightweight runtime control flow analysis for adaptive loop caching
Loop caches provide an effective method for decreasing memory hierarchy energy consumption by storing frequently executed code in a more energy efficient structure than the level ...
Marisha Rawlins, Ann Gordon-Ross
GLVLSI
2010
IEEE
220views VLSI» more  GLVLSI 2010»
9 years 2 months ago
Thermal-aware voltage droop compensation for multi-core architectures
As the rated performance of microprocessors increases, voltage droop emergencies become a significant problem. In this paper, two new techniques to combat voltage droop emergencie...
Jia Zhao, Basab Datta, Wayne P. Burleson, Russell ...
GLVLSI
2010
IEEE
190views VLSI» more  GLVLSI 2010»
9 years 2 months ago
A linear statistical analysis for full-chip leakage power with spatial correlation
In this paper, we present an approved linear-time algorithm for statistical leakage analysis in the present of any spatial correlation condition (strong or weak). The new algorith...
Ruijing Shen, Sheldon X.-D. Tan, Jinjun Xiong
GLVLSI
2010
IEEE
154views VLSI» more  GLVLSI 2010»
9 years 2 months ago
Resource-constrained timing-driven link insertion for critical delay reduction
For timing-driven or yield-driven designs, non-tree routing has become more and more popular and additional loops provide the redundant paths to protect against the effect of the ...
Jin-Tai Yan, Zhi-Wei Chen
GLVLSI
2010
IEEE
183views VLSI» more  GLVLSI 2010»
9 years 2 months ago
Semi-analytical model for schottky-barrier carbon nanotube and graphene nanoribbon transistors
This paper describes a physics-based semi-analytical model for Schottky-barrier carbon nanotube (CNT) and graphene nanoribbon (GNR) transistors. The model includes the treatment o...
Xuebei Yang, Gianluca Fiori, Giuseppe Iannaccone, ...
GLVLSI
2010
IEEE
150views VLSI» more  GLVLSI 2010»
9 years 2 months ago
Reliability analysis of power gated SRAM under combined effects of NBTI and PBTI in nano-scale CMOS
Transistor aging effects (NBTI and PBTI) impact the reliability of SRAM in nano-scale CMOS technologies. In this research, the combined effect of NBTI and PBTI on power gated SRAM...
Anuj Pushkarna, Hamid Mahmoodi
GLVLSI
2010
IEEE
161views VLSI» more  GLVLSI 2010»
9 years 4 months ago
Electromagnetic interaction of on-chip antennas and CMOS metal layers for wireless IC interconnects
The electromagnetic interaction of on-chip antennas and metal interconnects modeled in a 250 nm complementary metal-oxide semiconductor (CMOS) technology is investigated. A finite...
Ankit More, Baris Taskin
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