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DAC
2005
ACM
10 years 4 months ago
Performance space modeling for hierarchical synthesis of analog integrated circuits
Automated analog sizing is becoming an unavoidable solution for increasing analog design productivity. The complexity of typical analog SoC subsystems however calls for efficient ...
Georges G. E. Gielen, Trent McConaghy, Tom Eeckela...
ASPDAC
1998
ACM
86views Hardware» more  ASPDAC 1998»
10 years 7 months ago
Hierarchy - A CHDStd Tool for the Coming Deep Submicron Complex Design Crisis
Abstract -- This paper describes the use of a hierarchical design representation standard, CHDStd, as part of the architecture of the Chip Hierarchical Design System (CHDS). Detail...
S. Grout, G. Ledenbach, R. G. Bushroe, P. Fisher, ...
EMSOFT
2001
Springer
10 years 7 months ago
Hierarchical Approach for Design of Multi-vehicle Multi-modal Embedded Software
Abstract. Embedded systems composed of hardware and software components are designed to interact with a physical environment in real-time in order to fulfill control objectives an...
Tak-John Koo, Judith Liebman, Cedric Ma, Shankar S...
ASPDAC
2006
ACM
117views Hardware» more  ASPDAC 2006»
10 years 8 months ago
Signal-path driven partition and placement for analog circuit
This paper advances a new methodology based on signal-path information to resolve the problem of device-level placement for analog layout. This methodology is mainly based on three...
Di Long, Xianlong Hong, Sheqin Dong
DFT
2008
IEEE
138views VLSI» more  DFT 2008»
10 years 9 months ago
Exploring Density-Reliability Tradeoffs on Nanoscale Substrates: When do smaller less reliable devices make sense?
It is widely recognized that device and interconnect fabrics at the nanoscale will be characterized by an increased susceptibility to transient faults. This appears to be intrinsi...
Andrey V. Zykov, Gustavo de Veciana
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