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HIPEAC
2009
Springer
13 years 11 months ago
Predictive Runtime Code Scheduling for Heterogeneous Architectures
Heterogeneous architectures are currently widespread. With the advent of easy-to-program general purpose GPUs, virtually every recent desktop computer is a heterogeneous system. Co...
Víctor J. Jiménez, Lluís Vila...
HIPEAC
2009
Springer
13 years 11 months ago
Compiler Controlled Speculation for Power Aware ILP Extraction in Dataflow Architectures
Muhammad Umar Farooq, Lizy Kurian John, Margarida ...
HIPEAC
2009
Springer
13 years 11 months ago
Mapping and Synchronizing Streaming Applications on Cell Processors
Developing streaming applications on heterogenous multi-processor architectures like the Cell is difficult. Currently, application developers need to know about hardware details t...
Maik Nijhuis, Herbert Bos, Henri E. Bal, Cé...
HIPEAC
2009
Springer
13 years 11 months ago
Adapting Application Mapping to Systematic Within-Die Process Variations on Chip Multiprocessors
Process variations, which lead to timing and power variations across identically-designed components, have been identified as one of the key future design challenges by the semico...
Yang Ding, Mahmut T. Kandemir, Mary Jane Irwin, Pa...
HIPEAC
2009
Springer
13 years 11 months ago
Finding Stress Patterns in Microprocessor Workloads
Power consumption has emerged as a key design concern across the entire computing range, from low-end embedded systems to high-end supercomputers. Understanding the power character...
Frederik Vandeputte, Lieven Eeckhout
HIPEAC
2009
Springer
13 years 11 months ago
Hybrid Super/Subthreshold Design of a Low Power Scalable-Throughput FFT Architecture
In this article, we present a parallel implementation of a 1024 point Fast Fourier Transform (FFT) operating with a subthreshold supply voltage, which is below the voltage that tur...
Michael B. Henry, Leyla Nazhandali