Sciweavers

HPCA
2004
IEEE
14 years 4 months ago
Exploiting Prediction to Reduce Power on Buses
We investigate coding techniques to reduce the energy consumed by on-chip buses in a microprocessor. We explore several simple coding schemes and simulate them using a modified Si...
Victor Wen, Mark Whitney, Yatish Patel, John Kubia...
HPCA
2004
IEEE
14 years 4 months ago
Creating Converged Trace Schedules Using String Matching
This paper focuses on generating efficient software pipelined schedules for in-order machines, which we call Converged Trace Schedules. For a candidate loop, we form a string of t...
Satish Narayanasamy, Yuanfang Hu, Suleyman Sair, B...
HPCA
2004
IEEE
14 years 4 months ago
The Thrifty Barrier: Energy-Aware Synchronization in Shared-Memory Multiprocessors
Much research has been devoted to making microprocessors energy-efficient. However, little attention has been paid to multiprocessor environments where, due to the co-operative na...
Jian Li, José F. Martínez, Michael C...
HPCA
2004
IEEE
14 years 4 months ago
Signature Buffer: Bridging Performance Gap between Registers and Caches
Data communications between producer instructions and consumer instructions through memory incur extra delays that degrade processor performance. In this paper, we introduce a new...
Lu Peng, Jih-Kwon Peir, Konrad Lai
HPCA
2004
IEEE
14 years 4 months ago
Understanding Scheduling Replay Schemes
Modern microprocessors adopt speculative scheduling techniques where instructions are scheduled several clock cycles before they actually execute. Due to this scheduling delay, sc...
Ilhyun Kim, Mikko H. Lipasti
HPCA
2004
IEEE
14 years 4 months ago
Using Prime Numbers for Cache Indexing to Eliminate Conflict Misses
Using alternative cache indexing/hashing functions is a popular technique to reduce conflict misses by achieving a more uniform cache access distribution across the sets in the ca...
Mazen Kharbutli, Keith Irwin, Yan Solihin, Jaejin ...
HPCA
2004
IEEE
14 years 4 months ago
Wavelet Analysis for Microprocessor Design: Experiences with Wavelet-Based dI/dt Characterization
As microprocessors become increasingly complex, the techniques used to analyze and predict their behavior must become increasingly rigorous. This paper applies wavelet analysis te...
Russ Joseph, Zhigang Hu, Margaret Martonosi
HPCA
2004
IEEE
14 years 4 months ago
Stream Register Files with Indexed Access
Many current programmable architectures designed to exploit data parallelism require computation to be structured to operate on sequentially accessed vectors or streams of data. A...
Nuwan Jayasena, Mattan Erez, Jung Ho Ahn, William ...
HPCA
2004
IEEE
14 years 4 months ago
Out-of-Order Commit Processors
Modern out-of-order processors tolerate long latency memory operations by supporting a large number of inflight instructions. This is particularly useful in numerical applications...
Adrián Cristal, Daniel Ortega, Josep Llosa,...
HPCA
2004
IEEE
14 years 4 months ago
Accurate and Complexity-Effective Spatial Pattern Prediction
Recent research suggests that there are large variations in a cache's spatial usage, both within and across programs. Unfortunately, conventional caches typically employ fixe...
Chi F. Chen, Se-Hyun Yang, Babak Falsafi, Andreas ...