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HPCA
2005
IEEE
9 years 2 months ago
An Efficient Programmable 10 Gigabit Ethernet Network Interface Card
Paul Willmann, Hyong-youb Kim, Scott Rixner, Vijay...
HPCA
2005
IEEE
9 years 2 months ago
Accurate Energy Dissipation and Thermal Modeling for Nanometer-Scale Buses
With technology scaling, power dissipation and localized heating in global and semi-global bus wires are becoming increasingly important, and this necessitates the development of ...
Krishnan Sundaresan, Nihar R. Mahapatra
HPCA
2005
IEEE
9 years 2 months ago
Chip Multithreading: Opportunities and Challenges
Chip Multi-Threaded (CMT) processors provide support for many simultaneous hardware threads of execution in various ways, including Simultaneous Multithreading (SMT) and Chip Mult...
Lawrence Spracklen, Santosh G. Abraham
HPCA
2005
IEEE
9 years 2 months ago
Enterprise IT Trends and Implications for Architecture Research
The last decade has seen several changes in the structure and emphasis of enterprise IT systems. Specific infrastructure trends have included the emergence of large consolidated d...
Parthasarathy Ranganathan, Norman P. Jouppi
HPCA
2005
IEEE
9 years 2 months ago
The Soft Error Problem: An Architectural Perspective
Shubhendu S. Mukherjee, Joel S. Emer, Steven K. Re...
HPCA
2005
IEEE
9 years 2 months ago
Exploring the Design Space of Power-Aware Opto-Electronic Networked Systems
As microprocessors become increasingly interconnected, the power consumed by the interconnection network can no longer be ignored. Moreover, with demand for link bandwidth increas...
Xuning Chen, Li-Shiuan Peh, Gu-Yeon Wei, Yue-Kai H...
HPCA
2005
IEEE
9 years 2 months ago
Power Efficient Processor Architecture and The Cell Processor
This paper provides a background and rationale for some of the architecture and design decisions in the Cell processor, a processor optimized for compute-intensive and broadband r...
H. Peter Hofstee
HPCA
2005
IEEE
9 years 2 months ago
Heat Stroke: Power-Density-Based Denial of Service in SMT
In the past, there have been several denial-of-service (DOS) attacks which exhaust some shared resource (e.g., physical memory, process table, file descriptors, TCP connections) ...
Jahangir Hasan, Ankit Jalote, T. N. Vijaykumar, Ca...
HPCA
2005
IEEE
9 years 2 months ago
Microarchitectural Wire Management for Performance and Power in Partitioned Architectures
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
Rajeev Balasubramonian, Naveen Muralimanohar, Kart...
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