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HPCC
2009
Springer
11 years 4 months ago
Reliability Optimization of Reconfigurable Computing-Based Fault-Tolerant System
Domain-partition (DP) model is a general model for reliability maximization problem under given redundancy. In this paper, an improved DP model is used to formulate a reconfigurati...
Mi Zhou, Lihong Shang, Yu Hu
HPCC
2009
Springer
11 years 4 months ago
Graph-Based Task Replication for Workflow Applications
Abstract--The Grid is an heterogeneous and dynamic environment which enables distributed computation. This makes it a technology prone to failures. Some related work uses replicati...
Raúl Sirvent, Rosa M. Badia, Jesús L...
HPCC
2009
Springer
11 years 10 months ago
Dynamically Filtering Thread-Local Variables in Lazy-Lazy Hardware Transactional Memory
Abstract--Transactional Memory (TM) is an emerging technology which promises to make parallel programming easier. However, to be efficient, underlying TM system should protect only...
Sutirtha Sanyal, Sourav Roy, Adrián Cristal...
HPCC
2009
Springer
11 years 10 months ago
Kahn Process Networks are a Flexible Alternative to MapReduce
Experience has shown that development using shared-memory concurrency, the prevalent parallel programming paradigm today, is hard and synchronization primitives nonintuitive becaus...
Zeljko Vrba, Pål Halvorsen, Carsten Griwodz,...
HPCC
2009
Springer
11 years 11 months ago
Resource Leasing and the Art of Suspending Virtual Machines
Using virtual machines as a resource provisioning mechanism offers multiple benefits, most recently exploited by “infrastructure-as-a-service” clouds, but also poses several...
Borja Sotomayor, Rubén S. Montero, Ignacio ...
HPCC
2009
Springer
11 years 11 months ago
A Quantitative Study of Memory System Interference in Chip Multiprocessor Architectures
—The potential for destructive interference between running processes is increased as Chip Multiprocessors (CMPs) share more on-chip resources. We believe that understanding the ...
Magnus Jahre, Marius Grannæs, Lasse Natvig
HPCC
2009
Springer
11 years 11 months ago
Load Scheduling Strategies for Parallel DNA Sequencing Applications
This paper studies a load scheduling strategy with nearoptimal processing time leveraging the computational characteristics of parallel DNA sequence alignment algorithms, specific...
Sudha Gunturu, Xiaolin Li, Laurence Tianruo Yang
HPCC
2009
Springer
11 years 11 months ago
A Study of Bare PC Web Server Performance for Workloads with Dynamic and Static Content
—Bare PC applications do not use an operating system or kernel. The bare PC architecture avoids buffer copying, minimizes interrupts, uses a single thread of execution for proces...
Long He, Ramesh K. Karne, Alexander L. Wijesinha, ...
HPCC
2009
Springer
11 years 11 months ago
On Instruction-Level Method for Reducing Cache Penalties in Embedded VLIW Processors
Usual cache optimisation techniques for high performance computing are difficult to apply in embedded VLIW applications. First, embedded applications are not always well structur...
Samir Ammenouche, Sid Ahmed Ali Touati, William Ja...
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