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ICCAD
1994
IEEE
74views Hardware» more  ICCAD 1994»
13 years 8 months ago
Perturb and simplify: multi-level boolean network optimizer
Shih-Chieh Chang, Malgorzata Marek-Sadowska
ICCAD
1994
IEEE
134views Hardware» more  ICCAD 1994»
13 years 8 months ago
Boolean constrained encoding: a new formulation and a case study
1 This paper provides a new, generalized approach to the problem of encoding information as vectors of binary digits. We furnish a formal definition for the Boolean constrained enc...
Ney Laert Vilar Calazans
ICCAD
1994
IEEE
117views Hardware» more  ICCAD 1994»
13 years 8 months ago
Optimization of critical paths in circuits with level-sensitive latches
A simple extension of the critical path method is presented which allows more accurate optimization of circuits with level-sensitive latches. The extended formulation provides a s...
Timothy M. Burks, Karem A. Sakallah
ICCAD
1994
IEEE
59views Hardware» more  ICCAD 1994»
13 years 8 months ago
Fault dictionary compaction by output sequence removal
Fault dictionary compaction has been accomplished in the past by removing responses on individual output pins for speci c test vectors. In contrast to the previous work, we presen...
Vamsi Boppana, W. Kent Fuchs
ICCAD
1994
IEEE
95views Hardware» more  ICCAD 1994»
13 years 8 months ago
Provably correct high-level timing analysis without path sensitization
- This paper addresses the problem of true delay estimation during high level design. The existing delay estimation techniques either estimate the topological delay of the circuit ...
Subhrajit Bhattacharya, Sujit Dey, Franc Brglez
ICCAD
1994
IEEE
109views Hardware» more  ICCAD 1994»
13 years 8 months ago
Efficient breadth-first manipulation of binary decision diagrams
We propose new techniques for efficient breadth-first iterative manipulation of ROBDDs. Breadth-first iterative ROBDD manipulation can potentially reduce the total elapsed time by...
Pranav Ashar, Matthew Cheong
ICCAD
1994
IEEE
83views Hardware» more  ICCAD 1994»
13 years 8 months ago
A new built-in self-test approach for digital-to-analog and analog-to-digital converters
This paper proposes a test approach and circuitry suitable for built-in self-test (BIST) of digital-to-analog (D/A) and analog-to-digital (A/D) converters. Offset, gain, linearity...
Karim Arabi, Bozena Kaminska, Janusz Rzeszut
ICCAD
1994
IEEE
92views Hardware» more  ICCAD 1994»
13 years 8 months ago
Reuse of design objects in CAD frameworks
The reuse of well-tested and optimized design objects is an important aspect for decreasing design times, increasing design quality, and improving the predictability of designs. R...
Joachim Altmeyer, Stefan Ohnsorge, Bernd Schü...
ICCAD
1994
IEEE
101views Hardware» more  ICCAD 1994»
13 years 8 months ago
A general framework for vertex orderings, with applications to netlist clustering
We present a general framework for the construction of vertex orderings for netlist clustering. Our WINDOW algorithm constructs an ordering by iteratively adding the vertex with h...
Charles J. Alpert, Andrew B. Kahng
ICCAD
1994
IEEE
74views Hardware» more  ICCAD 1994»
13 years 8 months ago
Dataflow-driven memory allocation for multi-dimensional signal processing systems
Florin Balasa, Francky Catthoor, Hugo De Man