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ICCAD
1998
IEEE
86views Hardware» more  ICCAD 1998»
13 years 8 months ago
Polynomial methods for component matching and verification
James Smith, Giovanni De Micheli
ICCAD
1998
IEEE
79views Hardware» more  ICCAD 1998»
13 years 8 months ago
Reencoding for cycle-time minimization under fixed encoding length
This paper presents efficient reencoding and resynthesis algorithms for cycle-time minimization of multilevel implementations of synchronous finite state machines (FSMs) under a fi...
Balakrishnan Iyer, Maciej J. Ciesielski
ICCAD
1998
IEEE
83views Hardware» more  ICCAD 1998»
13 years 8 months ago
Lazy transition systems: application to timing optimization of asynchronous circuits
This paper introduces Lazy Transitions Systems (LzTSs). The notion of laziness explicitly distinguishes between the enabling and the firing of an event in a transition system. LzT...
Jordi Cortadella, Michael Kishinevsky, Alex Kondra...
ICCAD
1998
IEEE
90views Hardware» more  ICCAD 1998»
13 years 8 months ago
Technology mapping for domino logic
Domino logic is a popular con guration for implementing high-speed circuits. An algorithm for domino logic mapping, under a parameterized library style, is presented here. Practic...
Min Zhao, Sachin S. Sapatnekar
ICCAD
1998
IEEE
92views Hardware» more  ICCAD 1998»
13 years 8 months ago
Slicing floorplans with pre-placed modules
Fung Yu Young, D. F. Wong
ICCAD
1998
IEEE
116views Hardware» more  ICCAD 1998»
13 years 8 months ago
On primitive fault test generation in non-scan sequential circuits
A method is presented for identifying primitive path-delay faults in non-scan sequential circuits and generating robust tests for all robustly testable primitive faults. It uses t...
Ramesh C. Tekumalla, Premachandran R. Menon
ICCAD
1998
IEEE
82views Hardware» more  ICCAD 1998»
13 years 8 months ago
Symbolic model checking of process networks using interval diagram techniques
In this paper, an approach to symbolic model checking of process networks is introduced. It is based on interval decision diagrams (IDDs), a representation of multi-valued functio...
Karsten Strehl, Lothar Thiele
ICCAD
1998
IEEE
81views Hardware» more  ICCAD 1998»
13 years 8 months ago
A simultaneous routing tree construction and fanout optimization algorithm
- This paper presents an optimal algorithm for solving the problem of simultaneous fanout optimization and routing tree construction for an ordered set of critical sinks. The algor...
Amir H. Salek, Jinan Lou, Massoud Pedram
ICCAD
1998
IEEE
87views Hardware» more  ICCAD 1998»
13 years 8 months ago
Full-chip verification of UDSM designs
Resve A. Saleh, David Overhauser, Sandy Taylor
ICCAD
1998
IEEE
80views Hardware» more  ICCAD 1998»
13 years 8 months ago
On the optimization power of retiming and resynthesis transformations
Retiming and resynthesis transformations can be used for optimizing the area, power, and delay of sequential circuits. Even though this technique has been known for more than a de...
Rajeev K. Ranjan, Vigyan Singhal, Fabio Somenzi, R...