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ICCAD
2009
IEEE
151views Hardware» more  ICCAD 2009»
9 years 4 months ago
Timing yield-aware color reassignment and detailed placement perturbation for double patterning lithography
Double patterning lithography (DPL) is a likely resolution enhancement technique for IC production in 32nm and below technology nodes. However, DPL gives rise to two independent, ...
Mohit Gupta, Kwangok Jeong, Andrew B. Kahng
ICCAD
2009
IEEE
102views Hardware» more  ICCAD 2009»
9 years 4 months ago
Power-switch routing for coarse-grain MTCMOS technologies
Multi-threshold CMOS (MTCMOS) is an effective powergating technique to reduce IC's leakage power consumption by turning off idle devices with MTCMOS switches. However, few ex...
Tsun-Ming Tseng, Mango Chia-Tso Chao, Chien Pang L...
ICCAD
2009
IEEE
101views Hardware» more  ICCAD 2009»
9 years 4 months ago
Compacting test vector sets via strategic use of implications
As the complexity of integrated circuits has increased, so has the need for improving testing efficiency. Unfortunately, the types of defects are also becoming more complex, which...
Nuno Alves, Jennifer Dworak, R. Iris Bahar, Kundan...
ICCAD
2009
IEEE
85views Hardware» more  ICCAD 2009»
9 years 4 months ago
Synthesizing complementary circuits automatically
ShengYu Shen, Jianmin Zhang, Ying Qin, Sikun Li
ICCAD
2009
IEEE
98views Hardware» more  ICCAD 2009»
9 years 4 months ago
A rigorous framework for convergent net weighting schemes in timing-driven placement
We present a rigorous framework that defines a class of net weighting schemes in which unconstrained minimization is successively performed on a weighted objective. We show that, ...
Tony F. Chan, Jason Cong, Eric Radke
ICCAD
2009
IEEE
87views Hardware» more  ICCAD 2009»
9 years 4 months ago
Mitigation of intra-array SRAM variability using adaptive voltage architecture
SRAM cell design is driven by the need to satisfy static noise margin, write margin and read current margin (RCM) over all cells in the array in an energy-efficient manner. These ...
Ashish Kumar Singh, Ku He, Constantine Caramanis, ...
ICCAD
2009
IEEE
179views Hardware» more  ICCAD 2009»
9 years 4 months ago
Automatic memory partitioning and scheduling for throughput and power optimization
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...
Jason Cong, Wei Jiang, Bin Liu, Yi Zou
ICCAD
2009
IEEE
198views Hardware» more  ICCAD 2009»
9 years 4 months ago
Battery allocation for wireless sensor network lifetime maximization under cost constraints
Wireless sensor networks hold the potential to open new domains to distributed data acquisition. However, such networks are prone to premature failure because some nodes deplete t...
Hengyu Long, Yongpan Liu, Yiqun Wang, Robert P. Di...
ICCAD
2009
IEEE
113views Hardware» more  ICCAD 2009»
9 years 4 months ago
A performance analytical model for Network-on-Chip with constant service time routers
Performance models for Network-on-Chip (NoC) are essential for design, optimization and Quality of Service (QoS) assurance. Classical queueing theory has been often used to provid...
Nikita Nikitin, Jordi Cortadella
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