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ICCAD
2009
IEEE
154views Hardware» more  ICCAD 2009»
13 years 1 months ago
Pad assignment for die-stacking System-in-Package design
Wire bonding is the most popular method to connect signals between dies in System-in-Package (SiP) design nowadays. Pad assignment, which assigns inter-die signals to die pads so ...
Yu-Chen Lin, Wai-Kei Mak, Chris Chu, Ting-Chi Wang
ICCAD
2009
IEEE
82views Hardware» more  ICCAD 2009»
13 years 1 months ago
Operating system scheduling for efficient online self-test in robust systems
Very thorough online self-test is essential for overcoming major reliability challenges such as early-life failures and transistor aging in advanced technologies. This paper demon...
Yanjing Li, Onur Mutlu, Subhasish Mitra
ICCAD
2009
IEEE
152views Hardware» more  ICCAD 2009»
13 years 1 months ago
Adaptive sampling for efficient failure probability analysis of SRAM cells
In this paper, an adaptive sampling method is proposed for the statistical SRAM cell analysis. The method is composed of two components. One part is the adaptive sampler that manip...
Javid Jaffari, Mohab Anis
ICCAD
2009
IEEE
129views Hardware» more  ICCAD 2009»
13 years 1 months ago
A study of Through-Silicon-Via impact on the 3D stacked IC layout
Dae Hyun Kim, Krit Athikulwongse, Sung Kyu Lim
ICCAD
2009
IEEE
118views Hardware» more  ICCAD 2009»
13 years 1 months ago
Memory organization and data layout for instruction set extensions with architecturally visible storage
Present application specific embedded systems tend to choose instruction set extensions (ISEs) based on limitations imposed by the available data bandwidth to custom functional un...
Panagiotis Athanasopoulos, Philip Brisk, Yusuf Leb...
ICCAD
2009
IEEE
133views Hardware» more  ICCAD 2009»
13 years 1 months ago
A parallel preconditioning strategy for efficient transistor-level circuit simulation
A parallel computing approach for large-scale SPICE-accurate circuit simulation is described that is based on a new preconditioned iterative solver. The preconditioner involves the...
Heidi Thornquist, Eric R. Keiter, Robert J. Hoekst...
ICCAD
2009
IEEE
118views Hardware» more  ICCAD 2009»
13 years 1 months ago
Pre-bond testable low-power clock tree design for 3D stacked ICs
Pre-bond testing of 3D stacked ICs involves testing individual dies before bonding. The overall yield of 3D ICs improves with prebond testability because designers can avoid stack...
Xin Zhao, Dean L. Lewis, Hsien-Hsin S. Lee, Sung K...
ICCAD
2009
IEEE
118views Hardware» more  ICCAD 2009»
13 years 1 months ago
Characterizing within-die variation from multiple supply port IDDQ measurements
-- The importance of within-die process variation and its impact on product yield has increased significantly with scaling. Within-die variation is typically monitored by embedding...
Kanak Agarwal, Dhruva Acharyya, Jim Plusquellic
ICCAD
2009
IEEE
151views Hardware» more  ICCAD 2009»
13 years 1 months ago
GREMA: Graph reduction based efficient mask assignment for double patterning technology
Double patterning technology (DPT) has emerged as the most hopeful candidate for the next technology node of the ITRS roadmap [1]. The goal of a DPT decomposer is to decompose the...
Yue Xu, Chris Chu
ICCAD
2009
IEEE
93views Hardware» more  ICCAD 2009»
13 years 1 months ago
An efficient wakeup scheduling considering resource constraint for sensor-based power gating designs
Power gating has been a very effective way to reduce leakage power. One important design issue for a power gating design is to limit the surge current during the wakeup process. N...
Ming-Chao Lee, Yu-Ting Chen, Yo-Tzu Cheng, Shih-Ch...