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ICCD
2006
IEEE
105views Hardware» more  ICCD 2006»
10 years 3 months ago
A New Class of Sequential Circuits with Acyclic Test Generation Complexity
—This paper introduces a new class of sequential circuits called acyclically testable sequential circuits which is wider than the class of acyclic sequential circuits but whose t...
Chia Yee Ooi, Hideo Fujiwara
ICCD
2006
IEEE
134views Hardware» more  ICCD 2006»
10 years 3 months ago
Automated Design of Microfluidics-Based Biochips: Connecting Biochemistry to Electronics CAD
Microfluidics-based biochips offer exciting possibilities for highthroughput sequencing, parallel immunoassays, blood chemistry for clinical diagnostics, DNA sequencing, and envir...
Krishnendu Chakrabarty
ICCD
2006
IEEE
113views Hardware» more  ICCD 2006»
10 years 6 months ago
Choosing an Error Protection Scheme for a Microprocessor's L1 Data Cache
Abstract-- We deconstruct and compare the two dominant existing approaches for L1 data cache (L1D) error protection, with respect to performance, L2 cache bandwidth, power, and are...
Nathan Sadler, Daniel Sorin
ICCD
2006
IEEE
124views Hardware» more  ICCD 2006»
10 years 6 months ago
Customizable Fault Tolerant Caches for Embedded Processors
Abstract— The continuing divergence of processor and memory speeds has led to the increasing reliance on larger caches which have become major consumers of area and power in embe...
Subramanian Ramaswamy, Sudhakar Yalamanchili
ICCD
2006
IEEE
127views Hardware» more  ICCD 2006»
10 years 6 months ago
Power Droop Testing
Circuit activity is a function of input patterns. When circuit activity changes abruptly, it can cause sudden drop or rise in power supply voltage. This change is known as power d...
Ilia Polian, Alejandro Czutro, Sandip Kundu, Bernd...
ICCD
2006
IEEE
183views Hardware» more  ICCD 2006»
10 years 6 months ago
An Active Decoupling Capacitance Circuit for Inductive Noise Suppression in Power Supply Networks
The placement of on-die decoupling capacitors (decap) between the power and ground supply grids has become a common practice in high performance processor designs. In this paper, ...
Sanjay Pant, David Blaauw
ICCD
2006
IEEE
137views Hardware» more  ICCD 2006»
10 years 6 months ago
Reduction of Crosstalk Pessimism using Tendency Graph Approach
— Accurate estimation of worst-case crosstalk effects is critical for a realistic estimation of the worst-case behavior of deep sub-micron circuits. Crosstalk analysis models usu...
Murthy Palla, Klaus Koch, Jens Bargfrede, Manfred ...
ICCD
2006
IEEE
94views Hardware» more  ICCD 2006»
10 years 6 months ago
Quantitative Prediction of On-chip Capacitive and Inductive Crosstalk Noise and Discussion on Wire Cross-Sectional Area Toward I
Abstract— Capacitive and inductive crosstalk noises are expected to be more serious in advanced technologies. However, capacitive and inductive crosstalk noises in the future hav...
Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoy...
ICCD
2006
IEEE
92views Hardware» more  ICCD 2006»
10 years 6 months ago
Fast Speculative Address Generation and Way Caching for Reducing L1 Data Cache Energy
— L1 data caches in high-performance processors continue to grow in set associativity. Higher associativity can significantly increase the cache energy consumption. Cache access...
Dan Nicolaescu, Babak Salamat, Alexander V. Veiden...
ICCD
2006
IEEE
133views Hardware» more  ICCD 2006»
10 years 6 months ago
Patching Processor Design Errors
— Microprocessors can have design errors that escape the test and validation process. The cost to rectify these errors after shipping the processors can be very expensive as it m...
Satish Narayanasamy, Bruce Carneal, Brad Calder
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