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VLSID
1994
IEEE
113views VLSI» more  VLSID 1994»
13 years 8 months ago
A Methodology for Architecture Synthesis of Cascaded IIR Filters on TLU FPGAs
In this paper, we propose an architecture synthesis methodolog `to realize cascaded Infinite Impulse Response (IIRJfilter in Table Look Up (TLU) Field Progmmmable Gate A m y s (FP...
G. N. Rathna, S. K. Nandy, K. Parthasarathy
DAC
2003
ACM
13 years 9 months ago
Determining appropriate precisions for signals in fixed-point IIR filters
This paper presents an analytical framework for the implementation of digital infinite impulse response filters in fixed-point hardware on field programmable gate arrays. This ana...
Joan Carletta, Robert J. Veillette, Frederick W. K...