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    DATE
    1998
    IEEE
    93views Hardware» more  DATE 1998»
    Verification by Simulation Comparison using Interface Synthesis
    13 years 9 months ago
    Verification by Simulation Comparison using Interface Synthesis
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    One of the main tasks within the high-level synthesis (HLS) process is the verification problem to prove automatically the correctness of the synthesis results. Currently, the res...
    Cordula Hansen, Arno Kunzmann, Wolfgang Rosenstiel
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