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MICRO
2010
IEEE
134views Hardware» more  MICRO 2010»
13 years 2 months ago
Minimal Multi-threading: Finding and Removing Redundant Instructions in Multi-threaded Processors
Guoping Long, Diana Franklin, Susmit Biswas, Pablo...
DFT
2003
IEEE
142views VLSI» more  DFT 2003»
13 years 9 months ago
Exploiting Instruction Redundancy for Transient Fault Tolerance
This paper presents an approach for integrating fault-tolerance techniques into microprocessors by utilizing instruction redundancy as well as time redundancy. Smaller and smaller...
Toshinori Sato
IEEEPACT
2006
IEEE
13 years 10 months ago
Self-checking instructions: reducing instruction redundancy for concurrent error detection
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
Sumeet Kumar, Aneesh Aggarwal