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TSP
2008
123views more  TSP 2008»
13 years 4 months ago
A Rough Programming Approach to Power-Balanced Instruction Scheduling for VLIW Digital Signal Processors
The focus of this paper is on VLIW instruction scheduling that minimizes the variation of power consumed by the processor during the execution of a target program. We use rough set...
Shu Xiao, Edmund Ming-Kit Lai
IJAIT
2008
99views more  IJAIT 2008»
13 years 4 months ago
Optimal Basic Block Instruction Scheduling for Multiple-Issue Processors Using Constraint Programming
Instruction scheduling is one of the most important steps for improving the performance of object code produced by a compiler. A fundamental problem that arises in instruction sch...
Abid M. Malik, Jim McInnes, Peter van Beek
HEURISTICS
2008
92views more  HEURISTICS 2008»
13 years 4 months ago
Learning heuristics for basic block instruction scheduling
Instruction scheduling is an important step for improving the performance of object code produced by a compiler. A fundamental problem that arises in instruction scheduling is to ...
Abid M. Malik, Tyrel Russell, Michael Chase, Peter...
NIPS
1997
13 years 5 months ago
Learning to Schedule Straight-Line Code
Program execution speed on modern computers is sensitive, by a factor of two or more, to the order in which instructions are presented to the processor. To realize potential execu...
J. Eliot B. Moss, Paul E. Utgoff, John Cavazos, Do...
CP
2008
Springer
13 years 6 months ago
An Application of Constraint Programming to Superblock Instruction Scheduling
Modern computer architectures have complex features that can only be fully taken advantage of if the compiler schedules the compiled code. A standard region of code for scheduling ...
Abid M. Malik, Michael Chase, Tyrel Russell, Peter...
CGO
2004
IEEE
13 years 8 months ago
Using Dynamic Binary Translation to Fuse Dependent Instructions
Instruction scheduling hardware can be simplified and easily pipelined if pairs of dependent instructions are fused so they share a single instruction scheduling slot. We study an...
Shiliang Hu, James E. Smith
LCTRTS
1998
Springer
13 years 8 months ago
Non-local Instruction Scheduling with Limited Code Growth
Instruction scheduling is a necessary step in compiling for many modern microprocessors. Traditionally, global instruction scheduling techniques have outperformed local techniques....
Keith D. Cooper, Philip J. Schielke
ASPLOS
1998
ACM
13 years 8 months ago
Space-Time Scheduling of Instruction-Level Parallelism on a Raw Machine
Advances in VLSI technology will enable chips with over a billion transistors within the next decade. Unfortunately, the centralized-resource architectures of modern microprocesso...
Walter Lee, Rajeev Barua, Matthew Frank, Devabhakt...
ICS
1999
Tsinghua U.
13 years 8 months ago
Reorganizing global schedules for register allocation
Instruction scheduling is an important compiler technique for exploiting more instruction-level parallelism (ILP) in high-performance microprocessors, and in this paper, we study ...
Gang Chen, Michael D. Smith
CP
2001
Springer
13 years 8 months ago
Fast Optimal Instruction Scheduling for Single-Issue Processors with Arbitrary Latencies
Instruction scheduling is one of the most important steps for improving the performance of object code produced by a compiler. The local instruction scheduling problem is to nd a m...
Peter van Beek, Kent D. Wilken