WSC
1997
13 years 5 months ago
1997
We present an extension to an existing SPARC V8 instruction set simulator, SimICS, to support accurate profiling of branches and instruction cache misses. SimICS had previously su...
CODES
1998
IEEE
13 years 8 months ago
1998
IEEE
Timing analysis for checking satisfaction of constraints is a crucial problem in real-time system design. In some current approaches, the delay of software modules is precalculate...
ICCD
2006
IEEE
14 years 1 months ago
2006
IEEE
— In this paper, we present a comprehensive energy estimation framework for software executing on Very Long Instruction Word (VLIW) processor cores. The proposed energy model is ...
VLSID
2004
IEEE
14 years 5 months ago
2004
IEEE
The design of any application on a configurable System-on-a-Chip (SoC) like Atmel's FPSLIC is subject to a lot of constraints stemming from requirements of the application an...