Sciweavers

INTEGRATION
2008
127views more  INTEGRATION 2008»
13 years 3 months ago
A Viterbi decoder architecture for a standard-agile and reprogrammable transceiver
This paper presents a Viterbi Decoder (VD) architecture for a programmable data transmission system, implemented using a Field Programmable Gate Array (FPGA) device. This VD has b...
Lucia Bissi, Pisana Placidi, Giuseppe Baruffa, And...
INTEGRATION
2008
96views more  INTEGRATION 2008»
13 years 5 months ago
Implementation of a thermal management unit for canceling temperature-dependent clock skew variations
Thermal gradients across the die are becoming increasingly prominent as we scale further down into the sub-nanometer regime. While temperature was never a primary concern, its non...
Ashutosh Chakraborty, Karthik Duraisami, Ashoka Vi...
INTEGRATION
2008
94views more  INTEGRATION 2008»
13 years 5 months ago
Variability in nanometer CMOS: Impact, analysis, and minimization
Variation is a significant concern in nanometer-scale CMOS due to manufacturing equipment being pushed to fundamental limits, particularly in lithography. In this paper, we review...
Dennis Sylvester, Kanak Agarwal, Saumil Shah
INTEGRATION
2008
101views more  INTEGRATION 2008»
13 years 5 months ago
An efficient terminal and model order reduction algorithm
The paper proposes an efficient terminal and model order reduction method for compact modeling of interconnect circuits with many terminals. The new method is inspired by the rece...
Pu Liu, Sheldon X.-D. Tan, Boyuan Yan, Bruce McGau...
INTEGRATION
2008
89views more  INTEGRATION 2008»
13 years 5 months ago
Exact ESCT minimization for functions of up to six input variables
In this paper an efficient algorithm for the synthesis and exact minimization of ESCT(Exclusive or Sum of Complex Terms) expressions for Boolean functions of at most six variables...
Dimitrios Voudouris, Marinos Sampson, George K. Pa...
INTEGRATION
2008
87views more  INTEGRATION 2008»
13 years 5 months ago
SafeResynth: A new technique for physical synthesis
Physical synthesis is a relatively young field in Electronic Design Automation. Many published optimizations for physical synthesis end up hurting the quality of the final design,...
Kai-Hui Chang, Igor L. Markov, Valeria Bertacco
INTEGRATION
2008
183views more  INTEGRATION 2008»
13 years 5 months ago
Network-on-Chip design and synthesis outlook
With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor SystemsOn-Chip (MPSoCs) consisting of complex integrated component...
David Atienza, Federico Angiolini, Srinivasan Mura...
INTEGRATION
2008
191views more  INTEGRATION 2008»
13 years 5 months ago
Constant-time addition with hybrid-redundant numbers: Theory and implementations
Abstract: Hybrid-redundant number representation has provided a flexible framework for digitparallel addition in a manner that facilitates area-time tradeoffs for VLSI implementati...
Ghassem Jaberipur, Behrooz Parhami