Sciweavers

ICPP
2008
IEEE
13 years 10 months ago
Mapping Algorithms for Multiprocessor Tasks on Multi-Core Clusters
In this paper, we explore the use of hierarchically structured multiprocessor tasks (M-tasks) for programming multi-core cluster systems. These systems often have hierarchically s...
Jörg Dümmler, Thomas Rauber, Gudula R&uu...
DSN
2008
IEEE
13 years 10 months ago
A fault-tolerant directory-based cache coherence protocol for CMP architectures
Current technology trends of increased scale of integration are pushing CMOS technology into the deepsubmicron domain, enabling the creation of chips with a significantly greater...
Ricardo Fernández Pascual, José M. G...
ISPASS
2009
IEEE
13 years 11 months ago
GARNET: A detailed on-chip network model inside a full-system simulator
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, Nira...