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IOLTS
2008
IEEE
116views Hardware» more  IOLTS 2008»
13 years 11 months ago
SystemC-Based Minimum Intrusive Fault Injection Technique with Improved Fault Representation
In this paper, we propose a new SystemC-based fault injection technique that has improved fault representation in visible and on-the-fly data and signal registers. The technique ...
Rishad A. Shafik, Paul M. Rosinger, Bashir M. Al-H...
IOLTS
2008
IEEE
83views Hardware» more  IOLTS 2008»
13 years 11 months ago
On the Minimization of Potential Transient Errors and SER in Logic Circuits Using SPFD
Sets of Pairs of Functions to be Distinguished (SPFD) is a functional flexibility representation method that was recently introduced in the logic synthesis domain, and promises s...
Sobeeh Almukhaizim, Yiorgos Makris, Yu-Shen Yang, ...
IOLTS
2008
IEEE
102views Hardware» more  IOLTS 2008»
13 years 11 months ago
Integrating Scan Design and Soft Error Correction in Low-Power Applications
— Error correcting coding is the dominant technique to achieve acceptable soft-error rates in memory arrays. In many modern circuits, the number of memory elements in the random ...
Michael E. Imhof, Hans-Joachim Wunderlich, Christi...
IOLTS
2008
IEEE
117views Hardware» more  IOLTS 2008»
13 years 11 months ago
Verification and Analysis of Self-Checking Properties through ATPG
Present and future semiconductor technologies are characterized by increasing parameters variations as well as an increasing susceptibility to external disturbances. Transient err...
Marc Hunger, Sybille Hellebrand
IOLTS
2008
IEEE
112views Hardware» more  IOLTS 2008»
13 years 11 months ago
A Modular Memory BIST for Optimized Memory Repair
An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. Most of the existing built-in self-repair solutions reuse IP-C...
Philipp Öhler, Alberto Bosio, Giorgio Di Nata...
IOLTS
2008
IEEE
83views Hardware» more  IOLTS 2008»
13 years 11 months ago
Yield Improvement, Fault-Tolerance to the Rescue?
With the technology entering the nano dimension, manufacturing processes are less and less reliable, thus drastically impacting the yield. A possible solution to alleviate this pr...
Julien Vial, Alberto Bosio, Patrick Girard, Christ...
IOLTS
2008
IEEE
91views Hardware» more  IOLTS 2008»
13 years 11 months ago
Physical Demonstration of Polymorphic Self-Checking Circuits
Polymorphic gates can be considered as a new reconfigurable technology capable of integrating logic functions with sensing in a single compact structure. Polymorphic gates whose ...
Richard Ruzicka, Lukás Sekanina, Roman Prok...