ISCA
1998
IEEE
13 years 8 months ago
1998
IEEE
Future parallel computers must efficiently execute not only hand-coded applications but also programs written in high-level, parallel programming languages. Today's machines ...
ISCA
1998
IEEE
13 years 8 months ago
1998
IEEE
Data compression and prediction are closely related. Thus prediction methods based on data compression algorithms have been suggested for the branch prediction problem. In this wo...
ISCA
1998
IEEE
13 years 8 months ago
1998
IEEE
As the issue rate and depth of pipelining of high performance Superscalar processors increase, the importance of an excellent branch predictor becomes more vital to delivering the...
ISCA
1998
IEEE
13 years 8 months ago
1998
IEEE
This paper presents Threaded Multi-Path Execution (TME), which exploits existing hardware on a Simultaneous Multithreading (SMT) processor to speculatively execute multiple paths ...
ISCA
1998
IEEE
13 years 8 months ago
1998
IEEE
This paper examines simultaneous multithreading, a technique permitting several independent threads to issue instructions to a superscalar's multiple functional units in a si...
ISCA
1998
IEEE
13 years 8 months ago
1998
IEEE
ISCA
1998
IEEE
13 years 8 months ago
1998
IEEE
ISCA
1998
IEEE
13 years 8 months ago
1998
IEEE
This paper develops and validates an analytical model for evaluating various types of architectural alternatives for shared-memory systems with processors that aggressively exploi...
ISCA
1998
IEEE
13 years 8 months ago
1998
IEEE
ISCA
1998
IEEE
13 years 8 months ago
1998
IEEE
In high-performance computer systems, performance losses due to conditional branch instructions can be minimized by predicting a branch outcome and fetching, decoding, and/or issu...