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ISCA
2008
IEEE
134views Hardware» more  ISCA 2008»
13 years 11 months ago
Achieving Out-of-Order Performance with Almost In-Order Complexity
There is still much performance to be gained by out-of-order processors with wider issue widths. However, traditional methods of increasing issue width do not scale; that is, they...
Francis Tseng, Yale N. Patt
ISCA
2008
IEEE
188views Hardware» more  ISCA 2008»
13 years 11 months ago
MIRA: A Multi-layered On-Chip Interconnect Router Architecture
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...
Dongkook Park, Soumya Eachempati, Reetuparna Das, ...
ISCA
2008
IEEE
92views Hardware» more  ISCA 2008»
13 years 11 months ago
Counting Dependence Predictors
Modern processors rely on memory dependence prediction to execute load instructions as early as possible, speculating that they are not dependent on an earlier, unissued store. To...
Franziska Roesner, Doug Burger, Stephen W. Keckler
ISCA
2008
IEEE
139views Hardware» more  ISCA 2008»
13 years 11 months ago
Atom-Aid: Detecting and Surviving Atomicity Violations
Writing shared-memory parallel programs is error-prone. Among the concurrency errors that programmers often face are atomicity violations, which are especially challenging. They h...
Brandon Lucia, Joseph Devietti, Karin Strauss, Lui...
ISCA
2008
IEEE
113views Hardware» more  ISCA 2008»
13 years 11 months ago
A Two-Level Load/Store Queue Based on Execution Locality
Multicore processors have emerged as a powerful platform on which to efficiently exploit thread-level parallelism (TLP). However, due to Amdahl’s Law, such designs will be incr...
Miquel Pericàs, Adrián Cristal, Fran...
ISCA
2008
IEEE
132views Hardware» more  ISCA 2008»
13 years 11 months ago
Online Estimation of Architectural Vulnerability Factor for Soft Errors
As CMOS technology scales and more transistors are packed on to the same chip, soft error reliability has become an increasingly important design issue for processors. Prior resea...
Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. ...
ISCA
2008
IEEE
105views Hardware» more  ISCA 2008»
13 years 11 months ago
Intra-disk Parallelism: An Idea Whose Time Has Come
Server storage systems use a large number of disks to achieve high performance, thereby consuming a significant amount of power. In this paper, we propose to significantly reduc...
Sriram Sankar, Sudhanva Gurumurthi, Mircea R. Stan
ISCA
2008
IEEE
113views Hardware» more  ISCA 2008»
13 years 11 months ago
Running a Quantum Circuit at the Speed of Data
We analyze circuits for a number of kernels from popular quantum computing applications, characterizing the hardware resources necessary to take ancilla preparation off the critic...
Nemanja Isailovic, Mark Whitney, Yatish Patel, Joh...
ISCA
2008
IEEE
116views Hardware» more  ISCA 2008»
13 years 11 months ago
3D-Stacked Memory Architectures for Multi-core Processors
Three-dimensional integration enables stacking memory directly on top of a microprocessor, thereby significantly reducing wire delay between the two. Previous studies have examin...
Gabriel H. Loh