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ISCAS
1999
IEEE
74views Hardware» more  ISCAS 1999»
10 years 5 months ago
Mismatch-shaping serial digital-to-analog converter
A simple but accurate pseudo-passive mismatch-shaping D/A converter is described. A digital state machine is used to control the switching sequence of a symmetric two-capacitor ne...
Jesper Steensgaard, Un-Ku Moon, Gabor C. Temes
ISCAS
1999
IEEE
115views Hardware» more  ISCAS 1999»
10 years 5 months ago
Novel high-radix residue number system multipliers and adders
Radix-r modulo rn multipliers and adders are introduced in this paper. The proposed architectures are shown to require several times less area than previously reported architectur...
Vassilis Paliouras, Thanos Stouraitis
ISCAS
1999
IEEE
82views Hardware» more  ISCAS 1999»
10 years 5 months ago
Regular symmetric arrays for non-symmetric functions
A new class of non-totally symmetric functions which can be represented as simple regular symmetric arrays without redundancy is identified. Regular circuits are becoming crucialy...
Malgorzata Chrzanowska-Jeske
ISCAS
1999
IEEE
66views Hardware» more  ISCAS 1999»
10 years 5 months ago
Low energy register allocation beyond basic blocks
An approach of doing register allocation beyond basic blocks for low energy is presented in this paper. With careful analysis of boundary conditions between consecutive blocks, ou...
Yumin Zhang, Xiaobo Hu, Danny Z. Chen
ISCAS
1999
IEEE
79views Hardware» more  ISCAS 1999»
10 years 5 months ago
Energy minimization of system pipelines using multiple voltages
Modem computer and communication system design has to consider the timing constraints imposed by communication and system pipelines, and minimize the energy consumption. We adopt ...
Gang Qu, Darko Kirovski, Miodrag Potkonjak, Mani B...
ISCAS
1999
IEEE
145views Hardware» more  ISCAS 1999»
10 years 5 months ago
Fast FPGA-based pipelined digit-serial/parallel multipliers
Javier Valls, T. Sansaloni, M. M. Peiro, Eduardo I...
ISCAS
1999
IEEE
105views Hardware» more  ISCAS 1999»
10 years 5 months ago
Configuration self-test in FPGA-based reconfigurable systems
An FPGA-based reconfigurable system may contain boards of FPGAs which are reconfigured for different applications and must work correctly. This paper presents a novel approach for...
W. Quddus, Abhijit Jas, Nur A. Touba
ISCAS
1999
IEEE
86views Hardware» more  ISCAS 1999»
10 years 5 months ago
An algorithm for the verification of timing diagrams realizability
In this paper, we present a new method for verifying the realizability of a timing diagram with linear timing constraints, thus ensuring that the implementation of the underlying ...
A. El-Aboudi, El Mostapha Aboulhamid
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